All IPs > Wireline Communication > Error Correction/Detection > 2048B ECC Error Correction for High-Density NAND
The G15 IP is optimized for 2KB blocks, enhancing NAND controllers with a support system for higher ECC levels, simple integration across a variety of applications, and scalability for future technologies. Capable of reducing development costs while allowing customers to modify the source to fit specific requirements, it integrates seamlessly into established designs while also offering advanced ECC options.
| Class | Value |
|---|---|
| Categories |
Wireline Communication > Error Correction/Detection Memory Controller & PHY > NVM Express Memory Controller & PHY > SDRAM Controller Memory Controller & PHY > Flash Controller Security IP > Cryptography Cores Platform Level IP > Processor Core Independent |
| Error Correction Bits | 2-64+ bits |
| Availability | All Countries & Regions |
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