The ARDSoC Embedded DPDK is an innovative FPGA IP core that extends the functionality of DPDK into ARM-based systems. Designed to bypass traditional Linux network stacks, it saves precious ARM processor cycles by directly linking to data processing components. This core brings cutting-edge datacenter capabilities to embedded environments, enhancing performance in low-SWaP (Size, Weight, and Power) applications.
ARDSoC excels in reducing total cost of ownership, power consumption, and latency, especially when compared to legacy x86 solutions. The core supports packet vector and container-aware applications, making it ideal for edge devices employing protocols like CCIX, RDMA, and NVMe-oF. With seamless cross-compilation to ARM and significant power and latency reductions, it provides a substantial performance boost in datacenter settings.
Designed for Xilinx platforms, the core supports plug-and-play operability with Yocto Linux and Xilinx Vivado. This allows developers to quickly transition applications from prototype to production while maintaining high throughput—up to 64 Gbps—without packet loss. Its harmonized interaction between ARM processors and data structures is a hallmark of Atomic Rules' engineering expertise.
