C-NoC represents an intelligent advancement in coherent Network-on-Chip (NoC) solutions, targeted at delivering low-latency and high-efficiency data communication within complex SoCs. Its availability starts in the second half of 2023 and is marked by support for mesh, grid, and torus topologies, thus providing exceptional flexibility for complex system configurations.
This coherent NoC integrates on-chip L3 cache support to minimize latency and to streamline data handling across the network. It is compatible with multiple protocols like CHI, AXI4/3, and the ACE family, alongside variable bus width configurations from 32 to 2048 bits. The C-NoC is central to achieving balanced data flow and handling multiple communication streams simultaneously, which is vital for systems that necessitate high-bandwidth and smooth data integration.
The C-NoC's ability to adjust coherency levels and use efficient topological structures paves the way for optimized data processing operations, making it a preferred choice for high-performance computing scenarios. This ensures not only improved communication efficiency but also enhances the processing capability across processor cores, crucial for elevating overall system performance.
