The CAN 2.0/CAN FD Controller from Synective Labs offers a comprehensive implementation of a CAN controller, designed for seamless integration into FPGAs and ASICs. This advanced controller adheres to the ISO 11898-1:2015 standard, effectively supporting both the traditional CAN and the enhanced CAN FD protocol. The latter facilitates higher bitrate transmission up to 10 Mbit/s and can handle payloads up to 64 bytes, compared to the 8 bytes in standard CAN systems.
This IP is adaptable for a variety of FPGA devices, including those from Xilinx, Altera, Lattice, and Microsemi, and it supports common bus interfaces like AXI, Avalon, and APB. It is particularly beneficial for data logging and bus diagnostic tasks because of its extensive debugging features, though these can be minimized to save space in more conventional applications. Designed for flexibility, the IP can be configured with varying hardware buffer sizes and incorporates features like low-latency DMA, transmit rate adaptation, and multiple mode operations.
With capabilities such as listen-only mode, auto-acknowledge, and single-shot mode, this controller ensures versatility across different applications. It also supports SOC-type FPGAs for processor integration, effectively making it suitable for complex and varied system architectures.
