The D68000-BDM soft core is binary-compatible with an industry-standard 68000 32-bit microprocessor. It has a 16-bit data bus and a 24-bit address data bus. Of course, the code is compatible with MC68008, upward compatible with MC68010 virtual extensions, and MC68020 32-bit implementation of the architecture. Our efficient IP Core has an improved instruction set, which allows the execution of the program with higher performance than a standard 68000 core. The D68000-BDM comes with a fully automated test bench and a complete set of tests, allowing for easy package validation at each stage of the SoC design flow. A special testing platform has been built to run D68000-BDM with the uCLinux Operating System. The main goal of using uCLinux was to show that the D68000 microprocessor IP Core is fully functional and well validated. The hardware and software combination creates a very useful and flexible platform with the D68000 IP Core as the main processor. All DCD’s IP Cores are technology agnostic, ensuring 100% compatibility with all FPGA and ASIC vendors.
