Digital Core Design presents the D68000-CPU32+, a soft core microprocessor compatible with the 68000's CPU32+ architecture. With a 32-bit data bus and address bus, this core is optimized for high performance program execution and includes a built-in DoCD-BDM debugger interface, making it ideal for debugging complete SoC systems. Its support for 8-, 16-, and 32-bit unaligned/aligned data-bus transfers and a vast array of addressing modes offers flexibility in complex application development. Designed for universal compatibility across FPGA and ASIC vendors, the D68000-CPU32+ is delivered with a comprehensive suite of testbenches, automatic validation tests, and sculpted documentation. The architecture boasts advanced arithmetic and logic capabilities, making it suitable for a wide array of applications, from embedded systems to complex SoCs. With licensing methods streamlined for ease of access, utilizing the D68000-CPU32+ in various contexts is both simple and efficient.
