The D68000-CPU32+ soft core is binary-compatible with the industry standard 68000’s CPU32+ version of the 32-bit microcontroller. The D68000-CPU32+ has a 32-bit data bus and a 32-bit address data bus. It is code compatible with the 68000’s CPU32+ (version of MC68020). The core includes an improved instruction set, which allows program execution with higher performance than the standard 68000 core. It contains a built-in DoCD-BDM debugger interface and is delivered with a fully automated test bench, ensuring easy validation at each stage of the SoC design flow. It supports software compatibility, on-chip debugging, unaligned/aligned data-bus transfer, and various addressing and data modes. The IP Core is designed to be technology agnostic, ensuring compatibility across all FPGA and ASIC platforms.
