FlexGen Smart Network-on-Chip (NoC) by Arteris offers an innovative approach for crafting Network-on-Chip designs through AI and machine learning enhancements. This NoC IP allows design iterations to proceed up to ten times faster than traditional methodologies, primarily by automating the complex task of topology generation. By adopting FlexGen, developers can significantly reduce wire lengths and enhance power efficiency, thereby minimizing the typical manual effort involved in such processes. FlexGen caters to applications in sectors like automotive, data centers, and industrial electronics by streamlining design cycles for quicker launches and more exploratory design ventures.
Optimizing productivity with a substantial tenfold increase in speed, FlexGen is specifically engineered to address intricate design needs, condensing SoC or chiplet iteration times from several weeks to a mere few days. It achieves expert-level results by reducing routing congestion and improving both silicon area and throughput during physical synthesis. This is complemented by its capability to optimize wirelength and overall performance using advanced machine learning algorithms.
The core features of this IP include scripting-driven topology creation, incremental design capabilities, and automatic timing closure assistance. These tools equip engineers to manage intricate physical design challenges efficiently, allowing for substantial time savings and enhanced project outcomes. FlexGen’s design automation features enable developers to extract significant performance improvements while expediting the overall SoC design process.
