Supporting an impressive data rate, the GDDR7 PHY and Controller from InnoSilicon complies fully with JEDEC's latest standards. This advanced PHY embraces the 32Gbps PAM3 modulation scheme, allowing for a distribution of ten DQ signals and one DQE signal per data byte in the PAM3 mode. Additionally, the GDDR7 architecture supports the NRZ IO mode to enable efficient power operations. The PHY achieves remarkable speeds reaching up to 32Gbps, and the memory device interface can accommodate up to 128Gbps bandwidth, catering to the needs of high-end integrated circuits deployment. InnoSilicon ensures compatibility with the latest FinFET process nodes to deliver on high integration demands seen within high-end customer solutions.
