The JPEG Encoder for Image Compression is designed to deliver efficient lossy compression for various imaging applications. This encoder is compliant with the Baseline JPEG standard (ITU T.81), ensuring a balance between compression efficiency and image quality. It supports pixel depths of up to 12 bits, although 8 bits is the default setting. The encoder provides super low latency, making it ideal for rolling shutter cameras, and is available in multiple configurations to suit different application needs.
This encoder is particularly adaptable for multimedia applications requiring high-speed processing, including motion JPEG, thanks to its dual-pipe design that allows simultaneous encoding for formats like YUV422. This setup supports resolutions such as 1280x720 at 60 fps with a pixel clock of 100 MHz, although platform-specific optimizations can increase speed. The encoder operates without external RAM, relying only on FPGA and Ethernet PHY, which not only reduces power consumption but also simplifies hardware requirements.
Additionally, the JPEG Encoder is verified extensively against standard compliance through detailed simulation models that ensure both bit and cycle accuracy. The encoder can be implemented in various SoCs and integrates smoothly with existing systems, thanks to its adaptable architecture that supports various network streaming standards and embedded applications.
