The JPEG-LS Compression IP core provides a robust solution for lossless image data compression, following the ISO-14495-1 standard. Built on LOCO-I algorithm principles, this IP is ideal for low complexity compression needs requiring high encoding throughput and minimal silicon area, suitable for FPGAs and ASICs.
The core handles various image formats and offers both lossless and near-lossless modes, maximizing compression efficiency without sacrificing quality. This enables significant resource savings while maintaining output integrity across diverse application environments, from spaceborne imaging to industrial scanning.
This JPEG-LS core is developed for standalone operation, allowing for independent functionality once configured. Consistent and reliable, the IP is built on a compact design framework enabling easy implementation in constrained hardware, making it an excellent fit for high-speed, high-volume projects.
