The JPEG-LS Encoder offers a sophisticated solution for lossless image compression, particularly aimed at FPGA implementations. Conforming to JPEG-LS standards (ISO/IEC 14495-1 and ITU-T Rec. T.87), this encoder outperforms traditional JPEG-2000 in numerous lossless scenarios, significantly reducing resource consumption and eliminating the need for external memory.
With an encoding latency of less than one line, it efficiently processes images with an 8 to 16-bit depth. This IP core excels in scenarios requiring minimal resource use while offering superior compression results. It accommodates various input options, including pixel and data FIFO input/output and an Avalon Streaming interface with back-pressure
The encoder's flexibility extends to pixel-level data processing at one pixel per clock cycle, with configurable output data word width and adaptability to significant image sizes, including ultra-high definition. Its streamlined, low-latency architecture is tailored for applications requiring optimal lossless image compression with robust FPGA performance.
