All IPs > Interface Controller & PHY > MIPI > MIPI D-PHY
The MIPI D-PHY from SkyeChip is a thoroughly integrated macro designed to comply with the MIPI D-PHY v2.5 specification. With capabilities of up to 1.5 Gbps per lane and optional upgrades to 2.5 Gbps, it supports various low-power escape modes and ultra low-power states. This feature set is strategically designed for applications needing flexible high-speed data transfer capabilities.
| Class | Value |
|---|---|
| Categories |
Interface Controller & PHY > MIPI |
| Availability | All Countries & Regions |
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