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All IPs > Interface Controller & PHY > AMBA AHB / APB/ AXI > Processor System

Processor System

From Akeana

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Description

Akeana's Processor System IP consists of a collection of blocks designed to streamline the development of processor systems. These include a Compute Coherence Block (CCB), non-coherent and coherent interconnects, an IOMMU, and sophisticated interrupt controllers. This IP suite is perfect for creating customized, high-performance systems by linking a wide range of Akeana cores and external devices. The system is also compatible with industry standards like AMBA AXI and CHI, which facilitates the integration of complex multicore environments.

Tech Specs
Class Value
Categories Interface Controller & PHY > AMBA AHB / APB/ AXI
Interface Controller & PHY > RapidIO
Interface Controller & PHY > SATA
Coherence protocol Directory-based
Shared cache TLB entries 2048
Interconnect protocol AMBA AXI/CHI
Interrupt Controllers RISC-V APLIC, ACLINT, IMSIC
Availability All Countries & Regions
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