All IPs > Processor > Microcontroller > Y51
The Y51 processor utilizes the 8051 Instruction Set Architecture, operating with a 2-clock machine cycle for streamlined execution. This design is optimized for tasks that require swift, efficient instruction handling while maintaining architectural simplicity. The balanced configuration facilitates rapid processing, making it suitably versatile for various embedded systems that benefit from the established 8051 architecture.
| Class | Value |
|---|---|
| Categories |
Processor > Microcontroller Processor > Processor Cores Processor > CPU |
| Instruction Set Architecture | 8051 ISA |
| Availability | All Countries & Regions |
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