All IPs > Platform Level IP
Platform Level IP is a critical category within the semiconductor IP ecosystem, offering a wide array of solutions that are fundamental to the design and efficiency of semiconductor devices. This category includes various IP blocks and cores tailored for enhancing system-level performance, whether in consumer electronics, automotive systems, or networking applications. Suitable for both embedded control and advanced data processing tasks, Platform Level IP encompasses versatile components necessary for building sophisticated, multicore systems and other complex designs.
Subcategories within Platform Level IP cover a broad spectrum of integration needs:
1. **Multiprocessor/DSP (Digital Signal Processing)**: This includes specialized semiconductor IPs for handling tasks that require multiple processor cores working in tandem. These IPs are essential for applications needing high parallelism and performance, such as media processing, telecommunications, and high-performance computing.
2. **Processor Core Dependent**: These semiconductor IPs are designed to be tightly coupled with specific processor cores, ensuring optimal compatibility and performance. They include enhancements that provide seamless integration with one or more predetermined processor architectures, often used in specific applications like embedded systems or custom computing solutions.
3. **Processor Core Independent**: Unlike core-dependent IPs, these are flexible solutions that can integrate with a wide range of processor cores. This adaptability makes them ideal for designers looking to future-proof their technological investments or who are working with diverse processing environments.
Overall, Platform Level IP offers a robust foundation for developing flexible, efficient, and scalable semiconductor devices, catering to a variety of industries and technological requirements. Whether enhancing existing architectures or pioneering new designs, semiconductor IPs in this category play a pivotal role in the innovation and evolution of electronic devices.
The second generation of BrainChip's Akida platform expands upon its predecessor with enhanced features for even greater performance, efficiency, and accuracy in AI applications. This platform leverages advanced 8-bit quantization and advanced neural network support, including temporal event-based neural nets and vision transformers. These advancements allow for significant reductions in model size and computational requirements, making the Akida 2nd Generation a formidable component for edge AI solutions. The platform effectively supports complex neural models necessary for a wide range of applications, from advanced vision tasks to real-time data processing, all while minimizing cloud interaction to protect data privacy.
Panmnesia's CXL 3.1 Switch is a pivotal component in networking a vast array of CXL-enabled devices, setting the bar with its exceptional scalability and diverse connectivity. The switch supports seamless integration of hundreds of devices including memory, CPUs, and accelerators, facilitating flexible, high-performance configurations suited to demanding applications in data centers and beyond. Panmnesia's design enables easy scalability and efficient memory node expansion, reflecting their dedication to resource-efficient memory management. The CXL 3.1 Switch features a robust architecture that supports a wide array of network topologies, allowing for multi-level switching and complex node configurations. Its design addresses the unique challenges of composable server architecture, enabling fine-grained resource allocation. The switch leverages Panmnesia's proprietary CXL technology, underpinning its ability to perform management tasks across integrated memory spaces with minimal overhead, crucial for achieving high-speed, low-latency data exchange. Incorporating CXL standards, it is fully compatible with both legacy and next-generation devices, ensuring broad interoperability. The architecture allows servers to tailor resource availability by employing type-specific CXL features, such as port-based routing and multi-level switching. These features empower operators with the tools to configure extensive networks of diverse devices efficiently, thereby maximizing data center performance while minimizing costs.
The NMP-750 is a high-performance accelerator designed for edge computing, particularly suited for automotive, AR/VR, and telecommunications sectors. It boasts an impressive capacity of up to 16 TOPS and 16 MB local memory, powered by a RISC-V or Arm Cortex-R/A 32-bit CPU. The three AXI4 interfaces ensure seamless data transfer and processing. This advanced accelerator supports multifaceted applications such as mobility control, building automation, and multi-camera processing. It's designed to cope with the rigorous demands of modern digital and autonomous systems, offering substantial processing power and efficiency for intensive computational tasks. The NMP-750's ability to integrate into smart systems and manage spectral efficiency makes it crucial for communications and smart infrastructure management. It helps streamline operations, maintain effective energy management, and facilitate sophisticated AI-driven automation, ensuring that even the most complex data flows are handled efficiently.
The Tianqiao-70 is engineered for ultra-low power consumption while maintaining robust computational capabilities. This commercial-grade 64-bit RISC-V CPU core presents an ideal choice for scenarios demanding minimal power usage without conceding performance. It is primarily designed for emerging mobile applications and devices, providing both economic and environmental benefits. Its architecture prioritizes low energy profiles, making it perfect for a wide range of applications, including mobile computing, desktop devices, and intelligent IoT systems. The Tianqiao-70 fits well into environments where conserving battery life is a priority, ensuring that devices remain operational for extended periods without needing frequent charging. The core maintains a focus on energy efficiency, yet it supports comprehensive computing functions to address the needs of modern, power-sensitive applications. This makes it a flexible component in constructing a diverse array of SoC solutions and meeting specific market demands for sustainability and performance.
Exostiv is designed to provide significant visibility inside FPGA systems, enabling engineers to conduct real-environment testing and ensure that designs function efficiently before entering production. Featuring high-speed probes capable of capturing complex signals, Exostiv supports advanced FPGA debugging through its user-centric interface and adaptable insertion flows. It facilitates both pre-silicon validation and debugging by allowing in-depth monitoring across various clock domains. With connectivity options like QSFP28 and SAMTEC ARF-6, Exostiv empowers engineers with a flexible approach to manage different prototyping platforms effectively. The scalability of Exostiv allows its users to adapt to diverse FPGA configurations by adjusting the number and type of probes. Exostiv significantly reduces the likelihood of FPGA bugs in end-user environments by enabling engineers to thoroughly validate and adjust designs dynamically as needed. Its modular setup characterizes the adaptive nature of Exostiv’s architecture, making it suitable for application-specific optimizations in complex design environments.
The PCIe AI Accelerator Card powered by Metis AIPU offers unparalleled AI inference performance suitable for intensive vision applications. Incorporating a single quad-core Metis AIPU, it provides up to 214 TOPS, efficiently managing high-volume workloads with low latency. The card is further enhanced by the Voyager SDK, which streamlines application deployment, offering an intuitive development experience and ensuring simple integration across various platforms. Whether for real-time video analytics or other demanding AI tasks, the PCIe Accelerator Card is designed to deliver exceptional speed and precision.
The AX45MP is engineered as a high-performance processor that supports multicore architecture and advanced data processing capabilities, particularly suitable for applications requiring extensive computational efficiency. Powered by the AndesCore processor line, it capitalizes on a multicore symmetric multiprocessing framework, integrating up to eight cores with robust L2 cache management. The AX45MP incorporates advanced features such as vector processing capabilities and support for MemBoost technology to maximize data throughput. It caters to high-demand applications including machine learning, digital signal processing, and complex algorithmic computations, ensuring data coherence and efficient power usage.
The Metis AIPU M.2 accelerator module by Axelera AI is engineered for AI inference on edge devices with power and budget constraints. It leverages the quad-core Metis AIPU, delivering exceptional AI processing in a compact form factor. This solution is ideal for a range of applications, including computer vision in constrained environments, providing robust support for multiple camera feeds and parallel neural networks. With its easy integration and the comprehensive Voyager SDK, it simplifies the deployment of advanced AI models, ensuring high prediction accuracy and efficiency. This module is optimized for NGFF (Next Generation Form Factor) M.2 sockets, boosting the capability of any processing system with modest space and power requirements.
Eliyan's NuLink Die-to-Die PHY technology represents a significant advancement in chiplet interconnect solutions. Designed for standard packaging, this innovative PHY IP delivers robust high-performance with low power consumption, a balance that is crucial for modern semiconductor designs. The NuLink PHY supports multiple industry standards, including the Universal Chiplet Interface Express (UCIe) and Bunch of Wires (BoW), ensuring it can cater to a wide range of applications. A standout feature of the NuLink PHY is its simultaneous bidirectional (SBD) signaling capability, which allows data to be sent and received over the same wire at the same time, effectively doubling bandwidth. This makes it an ideal solution for data-intensive applications such as AI training and inference, particularly those requiring ultra-low latency and high reliability. The technology is also adaptable for different substrates, including both silicon and organic, offering designers flexibility in their packaging approaches. NuLink's architecture stems from extensive industry insights and is informed by Eliyan’s commitment to innovation. The platform provides a power-efficient and cost-effective alternative to traditional advanced packaging solutions. It achieves interposer-like performance metrics without the complexity and cost associated with such methods, enabling operational efficiency and reduced time-to-market for new semiconductor products.
Designed for entry-level server-class applications, the SCR9 is a 64-bit RISC-V processor core that comes equipped with cutting-edge features, such as an out-of-order superscalar pipeline, making it apt for processing-intensive environments. It supports both single and double-precision floating-point operations adhering to IEEE standards, which ensure precise computation results. This processor core is tailored for high-performance computing needs, with a focus on AI and ML, as well as conventional data processing tasks. It integrates an advanced interrupt system featuring APLIC configurations, enabling responsive operations even under heavy workloads. SCR9 supports up to 16 cores in a multi-cluster arrangement, each utilizing coherent multi-level caches to maintain rapid data processing and management. The comprehensive development package for SCR9 includes ready-to-deploy toolchains and simulators that expedite software development, particularly within Linux environments. The core is well-suited for deployment in entry-level server markets and data-intensive applications, with robust support for virtualization and heterogeneous architectures.
RaiderChip's GenAI v1 is a pioneering hardware-based generative AI accelerator, designed to perform local inference at the Edge. This technology integrates optimally with on-premises servers and embedded devices, offering substantial benefits in privacy, performance, and energy efficiency over traditional hybrid AI solutions. The design of the GenAI v1 NPU streamlines the process of executing large language models by embedding them directly onto the hardware, eliminating the need for external components like CPUs or internet connections. With its ability to support complex models such as the Llama 3.2 with 4-bit quantization on LPDDR4 memory, the GenAI v1 achieves unprecedented efficiency in AI token processing, coupled with energy savings and reduced latency. What sets GenAI v1 apart is its scalability and cost-effectiveness, significantly outperforming competitive solutions such as Intel Gaudi 2, Nvidia's cloud GPUs, and Google's cloud TPUs in terms of memory efficiency. This solution maximizes the number of tokens generated per unit of memory bandwidth, thus addressing one of the primary limitations in generative AI workflow. Furthermore, the adept memory usage of GenAI v1 reduces the dependency on costly memory types like HBM, opening the door to more affordable alternatives without diminishing processing capabilities. With a target-agnostic approach, RaiderChip ensures the GenAI v1 can be adapted to various FPGAs and ASICs, offering configuration flexibility that allows users to balance performance with hardware costs. Its compatibility with a wide range of transformers-based models, including proprietary modifications, ensures GenAI v1's robust placement across sectors requiring high-speed processing, like finance, medical diagnostics, and autonomous systems. RaiderChip's innovation with GenAI v1 focuses on supporting both vanilla and quantized AI models, ensuring high computation speeds necessary for real-time applications without compromising accuracy. This capability underpins their strategic vision of enabling versatile and sustainable AI solutions across industries. By prioritizing integration ease and operational independence, RaiderChip provides a tangible edge in applying generative AI effectively and widely.
The A25 processor model is a versatile CPU suitable for a variety of embedded applications. With its 5-stage pipeline and 32/64-bit architecture, it delivers high performance even with a low gate count, which translates to efficiency in power-sensitive environments. The A25 is equipped with Andes Custom Extensions that enable tailored instruction sets for specific application accelerations. Supporting robust high-frequency operations, this model shines in its ability to manage data prefetching and cache coherence in multicore setups, making it adept at handling complex processing tasks within constrained spaces.
Ventana's Veyron V2 CPU represents the pinnacle of high-performance AI and data center-class RISC-V processors. Engineered to deliver world-class performance, it supports extensive data center workloads, offering superior computational power and efficiency. The V2 model is particularly focused on accelerating AI and ML tasks, ensuring compute-intensive applications run seamlessly. Its design makes it an ideal choice for hyperscale, cloud, and edge computing solutions where performance is non-negotiable. This CPU is instrumental for companies aiming to scale with the latest in server-class technology.
The NMP-350 is a cutting-edge endpoint accelerator designed to optimize power usage and reduce costs. It is ideal for markets like automotive, AIoT/sensors, and smart appliances. Its applications span from driver authentication and predictive maintenance to health monitoring. With a capacity of up to 1 TOPS and 1 MB of local memory, it incorporates a RISC-V/Arm Cortex-M 32-bit CPU and supports three AXI4 interfaces. This makes the NMP-350 a versatile component for various industrial applications, ensuring efficient performance and integration. Developed as a low-power solution, the NMP-350 is pivotal for applications requiring efficient processing power without inflating energy consumption. It is crucial for mobile and battery-operated devices where every watt conserved adds to the operational longevity of the product. This product aligns with modern demands for eco-friendly and cost-effective technologies, supporting enhanced performance in compact electronic devices. Technical specifications further define its role in the industry, exemplifying how it brings robust and scalable solutions to its users. Its adaptability across different applications, coupled with its cost-efficiency, makes it an indispensable tool for developers working on next-gen AI solutions. The NMP-350 is instrumental for developers looking to seamlessly incorporate AI capabilities into their designs without compromising on economy or efficiency.
The eSi-3250 32-bit RISC processor core excels in applications needing efficient caching structures and high-performance computation, thanks to its support for both instruction and data caches. This core targets applications where slower memory technologies or higher core/bus clock ratios exist, by leveraging configurable caches which reduce power consumption and boost performance. This advanced processor design integrates a wide range of arithmetic capabilities, supporting IEEE-754 floating-point functions and 32-bit SIMD operations to facilitate complex data processing. It uses an optional memory management unit (MMU) for virtual memory implementation and memory protection, enhancing its functional safety in various operating environments.
The H.264 FPGA Encoder and CODEC Micro Footprint Cores from A2e Technologies are industry-leading solutions optimized for high-speed video encoding with minimal latency. Specially tailored for FPGA applications, this core ensures compliance with the H.264 Baseline and offers configurations to suit varying performance needs, such as low-cost evaluation licenses for flexibility. These cores are noted for their exceptionally compact size and rapid processing capabilities, enabling them to achieve 1080p at 60 frames per second with remarkable efficiency. One of the project's standout features is the 1ms latency at 1080p30, which is among the fastest in the industry. This core also supports custom configurations, allowing adjustments to pixel depth, resolution, and more, making it a versatile choice for developers looking to integrate video encoding in their systems. Moreover, these cores are ITAR compliant, offering a secure and adaptable solution for high-performance FPGA design. The scalability and customization options, including support for various pixel depths and resolutions, make these H.264 cores suitable for a wide array of applications, from real-time video streaming to embedded systems in industrial automation. By leveraging this advanced technology, A2e Technologies provides a robust solution that meets stringent industry standards and addresses specific customer needs effectively.
The ORC3990 SoC is a state-of-the-art solution designed for satellite IoT applications within Totum's DMSS™ network. This low-power sensor-to-satellite system integrates an RF transceiver, ARM CPUs, memories, and PA to offer seamless IoT connectivity via LEO satellite networks. It boasts an optimized link budget for effective indoor signal coverage, eliminating the need for additional GNSS components. This compact SoC supports industrial temperature ranges and is engineered for a 10+ year battery life using advanced power management.
AndesCore Processors offer a robust lineup of high-performance CPUs tailored for diverse market segments. Employing the AndeStar V5 instruction set architecture, these cores uniformly support the RISC-V technology. The processor family is classified into different series, including the Compact, 25-Series, 27-Series, 40-Series, and 60-Series, each featuring unique architectural advances. For instance, the Compact Series specializes in delivering compact, power-efficient processing, while the 60-Series is optimized for high-performance out-of-order execution. Additionally, AndesCore processors extend customization through Andes Custom Extension, which allows users to define specific instructions to accelerate application-specific tasks, offering a significant edge in design flexibility and processing efficiency.
The Yitian 710 Processor is an advanced Arm-based server chip developed by T-Head, designed to meet the extensive demands of modern data centers and enterprise applications. This processor boasts 128 high-performance Armv9 CPU cores, each coupled with robust caches, ensuring superior processing speeds and efficiency. With a 2.5D packaging technology, the Yitian 710 integrates multiple dies into a single unit, facilitating enhanced computational capability and energy efficiency. One of the key features of the Yitian 710 is its memory subsystem, which supports up to 8 channels of DDR5 memory, achieving a peak bandwidth of 281 GB/s. This configuration guarantees rapid data access and processing, crucial for high-throughput computing environments. Additionally, the processor is equipped with 96 PCIe 5.0 lanes, offering a dual-direction bandwidth of 768 GB/s, enabling seamless connectivity with peripheral devices and boosting system performance overall. The Yitian 710 Processor is meticulously crafted for applications in cloud services, big data analytics, and AI inference, providing organizations with a robust platform for their computing needs. By combining high core count, extensive memory support, and advanced I/O capabilities, the Yitian 710 stands as a cornerstone for deploying powerful, scalable, and energy-efficient data processing solutions.
The eSi-3200 is a versatile 32-bit RISC processor core that combines low power usage with high performance, ideal for embedded control applications using on-chip memory. Its structure supports a wide range of computational tasks with a modified-Harvard architecture that allows simultaneous instruction and data fetching. This design facilitates deterministic performance, making it perfect for real-time control. The eSi-3200 processor supports extensive arithmetic operations, offering optional IEEE-754 floating-point units for both single-precision and SIMD instructions which optimize parallel data processing. Its compatibility with AMBA AXI or AHB interconnects ensures easy integration into various systems.
The Chimera GPNPU is a general-purpose neural processing unit designed to address key challenges faced by system on chip (SoC) developers when deploying machine learning (ML) inference solutions. It boasts a unified processor architecture capable of executing matrix, vector, and scalar operations within a single pipeline. This architecture integrates the functions of a neural processing unit (NPU), digital signal processor (DSP), and other processors, which significantly simplifies code development and hardware integration. The Chimera GPNPU can manage various ML networks, including classical frameworks, vision transformers, and large language models, all within a single processor framework. Its flexibility allows developers to optimize performance across different applications, from mobile devices to automotive systems. The GPNPU family is fully synthesizable, making it adaptable to a range of performance requirements and process technologies, ensuring long-term viability and adaptability to changing ML workloads. The Cortex's sophisticated design includes a hybrid Von Neumann and 2D SIMD matrix architecture, predictive power management, and sophisticated memory optimization techniques, including an L2 cache. These features help reduce power usage and enhance performance by enabling the processor to efficiently handle complex neural network computations and DSP algorithms. By merging the best qualities of NPUs and DSPs, the Chimera GPNPU establishes a new benchmark for performance in AI processing.
The NMP-550 is tailored for enhanced performance efficiency, serving sectors like automotive, mobile, AR/VR, drones, and robotics. It supports applications such as driver monitoring, image/video analytics, and security surveillance. With a capacity of up to 6 TOPS and 6 MB local memory, this accelerator leverages either a RISC-V or Arm Cortex-M/A 32-bit CPU. Its three AXI4 interface support ensures robust interconnections and data flow. This performance boost makes the NMP-550 exceptionally suited for devices requiring high-frequency AI computations. Typical use cases include industrial surveillance and smart robotics, where precise and fast data analysis is critical. The NMP-550 offers a blend of high computational power and energy efficiency, facilitating complex AI tasks like video super-resolution and fleet management. Its architecture supports modern digital ecosystems, paving the way for new digital experiences through reliable and efficient data processing capabilities. By addressing the needs of modern AI workloads, the NMP-550 stands as a significant upgrade for those needing robust processing power in compact form factors.
The RISC-V Core-hub Generators from InCore are tailored for developers who need advanced control over their core architectures. This innovative tool enables users to configure core-hubs precisely at the instruction set and microarchitecture levels, allowing for optimized design and functionality. The platform supports diverse industry applications by facilitating the seamless creation of scalable and customizable RISC-V cores. With the RISC-V Core-hub Generators, InCore empowers users to craft their own processor solutions from the ground up. This flexibility is pivotal for businesses looking to capitalize on the burgeoning RISC-V ecosystem, providing a pathway to innovation with reduced risk and cost. Incorporating feedback from leading industry partners, these generators are designed to lower verification costs while accelerating time-to-market for new designs. Users benefit from InCore's robust support infrastructure and a commitment to simplifying complex chip design processes. This product is particularly beneficial for organizations aiming to integrate RISC-V technology efficiently into their existing systems, ensuring compatibility and enhancing functionality through intelligent automation and state-of-the-art tools.
The Talamo SDK is a comprehensive software development toolkit designed to facilitate the creation and deployment of advanced neuromorphic AI models on Innatera's Spiking Neural Processor (SNP). It integrates into the PyTorch environment, allowing developers to seamlessly build, train, and deploy neural network models, enhancing flexibility and accessibility in developing AI applications tailored to specific needs without requiring detailed expertise in neuromorphic computing. Talamo enhances the development workflow by offering standard and custom function integration, model zoo access, and application pipeline construction. The SDK provides profiling and optimization tools to ensure applications are both efficient and performant, allowing for quick design iterations. It also includes a hardware architecture simulator, enabling developers to validate and iterate their designs rapidly before implementation on actual hardware. With the Talamo SDK, developers can exploit the SNP's heterogeneous computing capabilities, utilizing its diverse architectural elements to optimize application performance. Additionally, its support for end-to-end application development, without the necessity of deep SNN knowledge, allows for broader reach and application, from research to industrial solutions.
xcore.ai is a versatile platform specifically crafted for the intelligent IoT market. It hosts a unique architecture with multi-threading and multi-core capabilities, ensuring low latency and high deterministic performance in embedded AI applications. Each xcore.ai chip contains 16 logical cores organized in two multi-threaded processor 'tiles' equipped with 512kB of SRAM and a vector unit for enhanced computation, enabling both integer and floating-point operations. The design accommodates extensive communication infrastructure within and across xcore.ai systems, providing scalability for complex deployments. Integrated with embedded PHYs for MIPI, USB, and LPDDR, xcore.ai is capable of handling a diverse range of application-specific interfaces. Leveraging its flexibility in software-defined I/O, xcore.ai offers robust support for AI, DSP, and control processing tasks, making it an ideal choice for enhancing IoT device functionalities. With its support for FreeRTOS, C/C++ development environment, and capability for deterministic processing, xcore.ai guarantees precision in performance. This allows developers to partition xcore.ai threads optimally for handling I/O, control, DSP, and AI/ML tasks, aligning perfectly with the specific demands of various applications. Additionally, the platform's power optimization through scalable tile clock frequency adjustment ensures cost-effective and energy-efficient IoT solutions.
The AndeShape Platforms are designed to streamline system development by providing a diverse suite of IP solutions for SoC architecture. These platforms encompass a variety of product categories, including the AE210P for microcontroller applications, AE300 and AE350 AXI fabric packages for scalable SoCs, and AE250 AHB platform IP. These solutions facilitate efficient system integration with Andes processors. Furthermore, AndeShape offers a sophisticated range of development platforms and debugging tools, such as ADP-XC7K160/410, which reinforce the system design and verification processes, providing a comprehensive environment for the innovative realization of IoT and other embedded applications.
The eSi-3264 is a cutting-edge 32/64-bit processor core that incorporates SIMD DSP extensions, making it suitable for applications requiring both efficient data parallelism and minimal silicon footprint. Designed for high-accuracy DSP tasks, this processor's multifunctional capabilities target audio processing, sensor hubs, and complex arithmetic operations. The eSi-3264 processor supports sizeable instruction and data caches, which significantly enhance system performance when accessing slower external memory sources. With dual and quad MAC operations that include 64-bit accumulation, it enhances DSP execution, applying 8, 16, and 32-bit SIMD instructions for real-time data handling and minimizing CPU load.
Time-Triggered Ethernet (TTEthernet) represents a significant advancement in network technology by integrating time-triggered communication over standard Ethernet infrastructures. This technology is designed to meet the stringent real-time requirements of aerospace and industrial applications, offering deterministic data transfer alongside regular Ethernet traffic within a shared network. TTEthernet delivers seamless synchronization across all network devices, ensuring that time-critical data packets are processed with precise timing. This capability is essential for applications where simultaneous actions from multiple systems require tight coordination, such as flight control systems or automated industrial processes. The protocol's compatibility with existing Ethernet environments allows for easy integration into current systems, reducing costs associated with network infrastructure upgrades. TTEthernet also enhances network reliability through redundant data paths and failover mechanisms, which guarantee continuous operation even in the event of link failures. As a result, TTEthernet provides a future-proof solution for managing both regular and mission-critical data streams within a single unified network environment. Its capacity to support various operational modes makes it an attractive choice for industries pursuing high standards of safety and efficiency.
The Avispado core is a 64-bit in-order RISC-V processor that provides an excellent balance of performance and power efficiency. With a focus on energy-conscious designs, Avispado facilitates the development of machine learning applications and is prime for environments with limited silicon resources. It leverages Semidynamics' innovative Gazzillion Misses™ technology to address challenges with sparse tensor weights, enhancing energy efficiency and operational performance for AI tasks. Structured to support multiprocessor configurations, Avispado is integral in systems requiring cache coherence and high memory throughput. It is particularly suitable for setups aimed at recommendation systems due to its ability to manage numerous outstanding memory requests, thanks to its advanced memory interface architectures. Integration with Semidynamics' Vector Unit enriches its offering, allowing dense computations and providing optimal performance in handling vector tasks. The ability to engage with Linux-ready environments and support for RISC-V Vector Specification 1.0 ensures that Avispado integrates seamlessly into existing frameworks, fostering innovative applications in fields like data centers and beyond.
The Veyron V1 CPU is designed to meet the demanding needs of data center workloads. Optimized for robust performance and efficiency, it handles a variety of tasks with precision. Utilizing RISC-V open architecture, the Veyron V1 is easily integrated into custom high-performance solutions. It aims to support the next-generation data center architectures, promising seamless scalability for various applications. The CPU is crafted to compete effectively against ARM and x86 data center CPUs, providing the same class-leading performance with added flexibility for bespoke integrations.
The Dynamic Neural Accelerator II (DNA-II) is an advanced IP core that elevates neural processing capabilities for edge AI applications. It is adaptable to various systems, exhibiting remarkable efficiency through its runtime reconfigurable interconnects, which aid in managing both transformer and convolutional neural networks. Designed for scalability, DNA-II supports numerous applications ranging from 1k MACs to extensive SoC implementations. DNA-II's architecture enables optimal parallelism by dynamically managing data paths between compute units, ensuring minimized on-chip memory bandwidth and maximizing operational efficiency. Paired with the MERA software stack, it provides seamless integration and optimization of neural network tasks, significantly enhancing computation ordering and resource distribution. Its applicability extends across various industry demands, massively increasing the operational efficiency of AI tasks at the edge. DNA-II, the pivotal force in the SAKURA-II Accelerator, brings innovative processing strength in compact formats, driving forward the development of edge-based generative AI and other demanding applications.
ISPido on VIP Board is a specialized runtime solution designed for optimal performance with Lattice Semiconductors’ Video Interface Platform. It features versatile configurations aimed at real-time image optimization, allowing users to choose between automatic best-setting selection or manual adjustments via menu-driven interfaces for precise gaming control. Compatible with two Sony IMX 214 image sensors, this setup ensures superior image clarity. The HDMI VIP Output Bridge Board and sophisticated calibration menus via serial ports offer further adaptability, accommodating unique project requirements effortlessly. This versatility, combined with efficient HDMI 1920 x 1080p output utilizing YCrCb 4:2:2, ensures that image quality remains consistently high. ISPido’s modular design ensures seamless integration and easy calibration, facilitating custom user preferences through real-time menu interfaces. Whether choosing gamma tables, applying varied filters, or selecting other personalization options, ISPido on VIP Board provides robust support tailored to electronic visualization devices.
GSHARK is a high-performance GPU IP designed to accelerate graphics on embedded devices. Known for its extreme power efficiency and seamless integration, this GPU IP significantly reduces CPU load, making it ideal for use in devices like digital cameras and automotive systems. Its remarkable track record of over one hundred million shipments underscores its reliability and performance. Engineered with TAKUMI's proprietary architecture, GSHARK integrates advanced rendering capabilities. This architecture supports real-time, on-the-fly graphics processing similar to that found in PCs, smartphones, and gaming consoles, ensuring a rich user experience and efficient graphics applications. This IP excels in environments where power consumption and performance balance are crucial. GSHARK is at the forefront of embedded graphics solutions, providing significant improvements in processing speed while maintaining low energy usage. Its architecture easily handles demanding graphics rendering tasks, adding considerable value to any embedded system it is integrated into.
The Ultra-Low-Power 64-Bit RISC-V Core developed by Micro Magic, Inc. is a highly efficient processor designed to deliver robust performance while maintaining minimal power consumption. This core operates at a remarkable 5GHz frequency while consuming only 10mW of power at 1GHz, making it an ideal solution for applications where energy efficiency is critical. The design leverages innovative techniques to sustain high performance with low voltage operation, ensuring that it can handle demanding processing tasks with reliability. This RISC-V core showcases Micro Magic's expertise in providing high-speed silicon solutions without compromising on power efficiency. It is particularly suited for applications that require both computational prowess and energy conservation, making it an optimal choice for modern SoC (System-on-Chip) designs. The core's architecture is crafted to support a wide range of high-performance computing requirements, offering flexibility and adaptability across various applications and industries. Its integration into larger systems can significantly enhance the overall energy efficiency and speed of electronic devices, contributing to advanced technological innovations.
The GenAI v1-Q from RaiderChip brings forth a specialized focus on quantized AI operations, reducing memory requirements significantly while maintaining impressive precision and speed. This innovative accelerator is engineered to execute large language models in real-time, utilizing advanced quantization techniques such as Q4_K and Q5_K, thereby enhancing AI inference efficiency especially in memory-constrained environments. By offering a 276% boost in processing speed alongside a 75% reduction in memory footprint, GenAI v1-Q empowers developers to integrate advanced AI capabilities into smaller, less powerful devices without sacrificing operational quality. This makes it particularly advantageous for applications demanding swift response times and low latency, including real-time translation, autonomous navigation, and responsive customer interactions. The GenAI v1-Q diverges from conventional AI solutions by functioning independently, free from external network or cloud auxiliaries. Its design harmonizes superior computational performance with scalability, allowing seamless adaptation across variegated hardware platforms including FPGAs and ASIC implementations. This flexibility is crucial for tailoring performance parameters like model scale, inference velocity, and power consumption to meet exacting user specifications effectively. RaiderChip's GenAI v1-Q addresses crucial AI industry needs with its ability to manage multiple transformer-based models and confidential data securely on-premises. This opens doors for its application in sensitive areas such as defense, healthcare, and financial services, where confidentiality and rapid processing are paramount. With GenAI v1-Q, RaiderChip underscores its commitment to advancing AI solutions that are both environmentally sustainable and economically viable.
The Hanguang 800 AI Accelerator by T-Head is an advanced semiconductor technology designed to accelerate AI computations and machine learning tasks. This accelerator is specifically optimized for high-performance inference, offering substantial improvements in processing times for deep learning applications. Its architecture is developed to leverage parallel computing capabilities, making it highly suitable for tasks that require fast and efficient data handling. This AI accelerator supports a broad spectrum of machine learning frameworks, ensuring compatibility with various AI algorithms. It is equipped with specialized processing units and a high-throughput memory interface, allowing it to handle large datasets with minimal latency. The Hanguang 800 is particularly effective in environments where rapid inferencing and real-time data processing are essential, such as in smart cities and autonomous driving. With its robust design and multi-faceted processing abilities, the Hanguang 800 Accelerator empowers industries to enhance their AI and machine learning deployments. Its capability to deliver swift computation and inference results ensures it is a valuable asset for companies looking to stay at the forefront of technological advancement in AI applications.
Functioning as a comprehensive cross-correlator, the XCM_64X64 facilitates efficient and precise signal processing required in synthetic radar receivers and advanced spectrometers. Designed on IBM's 45nm SOI CMOS technology, it supports ultra-low power operation at about 1.5W for the entire array, with a sampling performance of 1GSps across a bandwidth of 10MHz to 500MHz. The ASIC is engineered to manage high-throughput data channels, a vital component for high-energy physics and space observation instruments.
aiWare stands out as a premier hardware IP for high-performance neural processing, tailored for complex automotive AI applications. By offering exceptional efficiency and scalability, aiWare empowers automotive systems to harness the full power of neural networks across a wide variety of functions, from Advanced Driver Assistance Systems (ADAS) to fully autonomous driving platforms. It boasts an innovative architecture optimized for both performance and energy efficiency, making it capable of handling the rigorous demands of next-generation AI workloads. The aiWare hardware features an NPU designed to achieve up to 256 Effective Tera Operations Per Second (TOPS), delivering high performance at significantly lower power. This is made possible through a thoughtfully engineered dataflow and memory architecture that minimizes the need for external memory bandwidth, thus enhancing processing speed and reducing energy consumption. The design ensures that aiWare can operate efficiently across a broad range of conditions, maintaining its edge in both small and large-scale applications. A key advantage of aiWare is its compatibility with aiMotive's aiDrive software, facilitating seamless integration and optimizing neural network configurations for automotive production environments. aiWare's development emphasizes strong support for AI algorithms, ensuring robust performance in diverse applications, from edge processing in sensor nodes to high central computational capacity. This makes aiWare a critical component in deploying advanced, scalable automotive AI solutions, designed specifically to meet the safety and performance standards required in modern vehicles.
The Tyr Superchip is engineered to tackle the most daunting computational challenges in edge AI, autonomous driving, and decentralized AIoT applications. It merges AI and DSP functionalities into a single, unified processing unit capable of real-time data management and processing. This all-encompassing chip solution handles vast amounts of sensor data necessary for complete autonomous driving and supports rapid AI computing at the edge. One of the key challenges it addresses is providing massive compute power combined with low-latency outputs, achieving what traditional architectures cannot in terms of energy efficiency and speed. Tyr chips are surrounded by robust safety protocols, being ISO26262 and ASIL-D ready, making them ideally suited for the critical standards required in automotive systems. Designed with high programmability, the Tyr Superchip accommodates the fast-evolving needs of AI algorithms and supports modern software-defined vehicles. Its low power consumption, under 50W for higher-end tasks, paired with a small silicon footprint, ensures it meets eco-friendly demands while staying cost-effective. VSORA’s Superchip is a testament to their innovative prowess, promising unmatched efficiency in processing real-time data streams. By providing both power and processing agility, it effectively supports the future of mobility and AI-driven automation, reinforcing VSORA’s position as a forward-thinking leader in semiconductor technology.
ZIA Stereo Vision by Digital Media Professionals Inc. revolutionizes three-dimensional image processing by delivering exceptional accuracy and performance. This stereo vision technology is particularly designed for use in autonomous systems and advanced robotics, where precise spatial understanding is crucial. It incorporates deep learning algorithms to provide robust 3D mapping and object recognition capabilities. The IP facilitates extensive depth perception and analyzed spatial data for applications in areas like automated surveillance and navigation. Its ability to create detailed 3D maps of environments assists machines in interpreting and interacting with their surroundings effectively. By applying sophisticated AI algorithms, it enhances the ability of devices to make intelligent decisions based on rich visual data inputs. Integration into existing systems is simplified due to its compatibility with a variety of platforms and configurations. By enabling seamless deployment in sectors demanding high reliability and accuracy, ZIA Stereo Vision stands as a core component in the ongoing evolution towards more autonomous and smart digital environments.
ISELED Technology introduces a revolutionary approach to automotive interior lighting with smart digital RGB LEDs. These LEDs facilitate dynamic lighting solutions by embedding a sophisticated driver directly with the LED, enabling unique features such as pre-calibration and independent temperature compensation. This innovation allows for significant simplification of the overall lighting system architecture as the intricate calibration tasks are handled at the LED module level. The ISELED system supports an expansive 4K address space, offering seamless integration into daisy-chained configurations and precise color control through a straightforward digital command interface. This approach not only enhances visual quality but also reduces the complexity typically associated with RGB LED configurations, eliminating the need for separate power management or additional calibration setups. ISELED’s robust design is particularly beneficial in automotive environments, where durability and dependability are crucial. The technology also extends to ILaS systems, providing interconnected networks of LEDs and sensors that are both energy-efficient and capable of rapid diagnostics and reconfiguration. In essence, ISELED technology allows automotive designers unprecedented flexibility and control over vehicle interior lighting designs.
The M3000 Graphics Processor offers a comprehensive solution for 3D rendering, providing high efficiency and quality output in graphical processing tasks. It paves the way for enhancing visual performance in devices ranging from gaming consoles to sophisticated simulation systems. This processor supports an array of graphic formats and resolutions, rendering high-quality 3D visuals efficiently. Its robust architecture is designed to handle complex visual computations, making it ideal for industries that require superior graphical interfaces and detailed rendering capabilities. As part of its user-friendly design, the M3000 is compatible with established graphic APIs, allowing for easy integration and broad utility within existing technology structures. The processor serves as a benchmark for innovations in 3D graphical outputs, ensuring optimal end-user experiences in digital simulation and entertainment environments.
RegSpec is a comprehensive register specification tool that excels in generating Control Configuration and Status Register (CCSR) code. The tool is versatile, supporting various input formats like SystemRDL, IP-XACT, and custom formats via CSV, Excel, XML, or JSON. Its ability to output in formats such as Verilog RTL, System Verilog UVM code, and SystemC header files makes it indispensable for IP designers, offering extensive features for synchronization across multiple clock domains and interrupt handling. Additionally, RegSpec automates verification processes by generating UVM code and RALF files useful in firmware development and system modeling.
The BlueLynx Chiplet Interconnect facilitates seamless communication between chiplets, vital for modern semiconductor designs that emphasize modularity and efficiency. This technology supports both physical and link layer interfaces, adhering to the Universal Chiplet Interconnect Express (UCIe) and Open Compute Project (OCP) Bunch of Wires (BoW) standards. BlueLynx ensures high-speed data transfer, offering customizable options to tailor designs for specific workloads and application needs. Optimized for AI, high-performance computing, and mobile markets, BlueLynx's die-to-die adaptability provides system architects with the leeway to integrate a variety of packaging types and process nodes, including 2D, advanced 2.5D, and innovative 3D packaging options. The solution is recognized for delivering a balance of bandwidth, energy efficiency, and latency, ensuring robust system performance while minimizing power consumption. This IP has been silicon-proven across multiple process nodes, including advanced technologies like 3nm, 4nm, and 5nm, and is supported by major semiconductor foundries. It offers valuable features such as low latency, improved PPA (Power, Performance, Area), and industry-standard compliance, positioning it as a reliable and high-performing interconnect solution within the semiconductor industry.
ISPido is a sophisticated Image Signal Processing Pipeline designed for comprehensive image enhancement tasks. It is ultra-configurable using the AXI4-LITE protocol, supporting integration with processors like RISCV. The ISP Pipeline accommodates procedures such as defective pixel correction, color interpolation using the Malvar-Cutler algorithm, and various statistical adjustments to facilitate adaptive control. Furthermore, ISPido incorporates comprehensive color conversion functionalities, with support for HDR processing and chroma resampling to 4:2:2/4:2:0 formats. Supporting bit depths of 8, 10, or 12 bits, and resolutions up to 7680x7680, ISPido ensures high-resolution output crucial for next-generation image processing needs. This flexibility positions it perfectly for projects ranging from low power devices to ultra-high-definition vision systems. Each component of ISPido aligns with AMBA AXI4 standards, ensuring broad compatibility and modular customization possibilities. Such features make it an ideal choice for heterogeneous electronics ecosystems involving CPUs, GPUs, and specialized processors, further solidifying its practicality for widespread deployment.
The SAKURA-II AI Accelerator stands out as a high-performance, energy-efficient edge co-processor designed to handle advanced AI tasks. Tailored for real-time, batch-one AI inferencing, it supports multi-billion parameter models, such as Llama 2 and Stable Diffusion, while maintaining low power consumption. The core technology leverages a dynamic neural accelerator for runtime reconfigurability and exceptional parallel processing, making it ideal for edge-based generative AI applications. With its flexible architecture, SAKURA-II facilitates the seamless execution of diverse AI models concurrently, without compromising on efficiency or speed. Integrated with the MERA compiler framework, it ensures easy deployment across various hardware systems, supporting frameworks like PyTorch and TensorFlow Lite for seamless integration. This AI accelerator excels in AI models for vision, language, and audio, fostering innovative content creation across these domains. Moreover, SAKURA-II supports a robust DRAM bandwidth, far surpassing competitors, ensuring superior performance for large language and vision models. It offers support for significant neural network demands, making it a powerful asset for developers in the edge AI landscape.
The Zhenyue 510 SSD Controller is a high-performance enterprise-grade controller providing robust management for SSD storage solutions. It is engineered to deliver exceptional I/O throughput of up to 3400K IOPS and a data transfer rate reaching 14 GByte/s. This remarkable performance is achieved through the integration of T-Head's proprietary low-density parity-check (LDPC) error correction algorithms, enhancing reliability and data integrity. Equipped with T-Head's low-latency architecture, the Zhenyue 510 offers swift read and write operations, crucial for applications demanding fast data processing capabilities. It supports flexible Nand flash interfacing, which makes it adaptable to multiple generations of flash memory technologies. This flexibility ensures that the device remains a viable solution as storage standards evolve. Targeted at applications such as online transactions, large-scale data management, and software-defined storage systems, the Zhenyue 510's advanced capabilities make it a cornerstone for organizations needing seamless and efficient data storage solutions. The combination of innovative design, top-tier performance metrics, and adaptability positions the Zhenyue 510 as a leader in SSD controller technologies.
The Jotunn8 is engineered to redefine performance standards for AI datacenter inference, supporting prominent large language models. Standing as a fully programmable and algorithm-agnostic tool, it supports any algorithm, any host processor, and can execute generative AI like GPT-4 or Llama3 with unparalleled efficiency. The system excels in delivering cost-effective solutions, offering high throughput up to 3.2 petaflops (dense) without relying on CUDA, thus simplifying scalability and deployment. Optimized for cloud and on-premise configurations, Jotunn8 ensures maximum utility by integrating 16 cores and a high-level programming interface. Its innovative architecture addresses conventional processing bottlenecks, allowing constant data availability at each processing unit. With the potential to operate large and complex models at reduced query costs, this accelerator maintains performance while consuming less power, making it the preferred choice for advanced AI tasks. The Jotunn8's hardware extends beyond AI-specific applications to general processing (GP) functionalities, showcasing its agility. By automatically selecting the most suitable processing paths layer-by-layer, it optimizes both latency and power consumption. This provides its users with a flexible platform that supports the deployment of vast AI models under efficient resource utilization strategies. This product's configuration includes power peak consumption of 180W and an impressive 192 GB on-chip memory, accommodating sophisticated AI workloads with ease. It aligns closely with theoretical limits for implementation efficiency, accentuating VSORA's commitment to high-performance computational capabilities.
The XCM_64X64_A is a powerful array designed for cross-correlation operations, integrating 128 ADCs each capable of 1GSps. Targeted at high-precision synthetic radar and radiometer systems, this ASIC delivers ultra-low power consumption around 0.5W, ensuring efficient performance over a wide bandwidth range from 10MHz to 500MHz. Built on IBM's 45nm SOI CMOS technology, it forms a critical component in systems requiring rapid data sampling and intricate signal processing, all executed with high accuracy, making it ideal for airborne and space-based applications.
The Azurite Core-hub by InCore Semiconductors is a sophisticated solution designed to offer scalable RISC-V SoCs with high-speed secure interconnect capabilities. This processor is tailored for performance-demanding applications, ensuring that systems maintain robust security while executing tasks at high speeds. Azurite leverages advanced interconnect technologies to enhance the communication between components within a SoC, making it ideal for industries that require rapid data transfer and high processing capabilities. The core is engineered to be scalable, supporting a wide range of applications from edge AI to functional safety systems, adapting seamlessly to various industry needs. Engineered with a focus on security, the Azurite Core-hub incorporates features that protect data integrity and system operation in a dynamic technological landscape. This makes it a reliable choice for companies seeking to integrate advanced RISC-V architectures into their security-focused applications, offering not just innovation but also peace of mind with its secure design.
Join the world's most advanced semiconductor IP marketplace!
It's free, and you'll get all the tools you need to discover IP, meet vendors and manage your IP workflow!