All IPs > Security IP > Cryptography Cores
In today's interconnected world, the importance of secure communication and data protection cannot be overstated. Cryptography cores are a crucial subset of semiconductor IPs designed to provide foundational security solutions across a variety of electronic systems. At their core, these IPs implement complex algorithms that ensure the confidentiality, integrity, and authenticity of data being processed and exchanged.
The cryptography cores available in this category offer a diverse range of features tailored to different security needs. From symmetric-key algorithms like AES to asymmetric-key systems such as RSA and ECC, these cores ensure that systems can securely encrypt and decrypt information, protecting it from unauthorized access and tampering. By embedding these cryptographic functions directly into hardware, it becomes possible to achieve faster processing speeds and higher levels of security compared to software implementations.
These semiconductor IPs are widely used in applications where data security is paramount. This includes, but is not limited to, industries such as finance, telecommunications, and healthcare. Devices utilizing cryptography cores can range from secure payment systems, ensuring safe financial transactions, to mobile devices for secure communications, to medical devices that safeguard sensitive health information. Additionally, with the rise of the Internet of Things (IoT), cryptography cores are increasingly crucial in providing secure connections for a myriad of smart devices.
By integrating cryptography cores into your designs, you not only improve security but also future-proof your products against many potential vulnerabilities. As security threats continue to evolve, having robust cryptography solutions is essential for maintaining trust and reliability in your products and services. Whether you're developing a new application or enhancing an existing one, our category of cryptography cores offers the semiconductor IP solutions you need to meet today's stringent security demands.
Overview: Cybersecurity IPs offer a range of essential security features to protect your digital assets and sensitive information. From True Random Number Generators (TRNG) to advanced encryption algorithms like AES, DES, 3DES, and cryptographic hash functions like SHA, as well as RSA for secure key exchange and digital signatures, the IPs provide a comprehensive suite of tools to safeguard your data. Key Features: True Random Number Generator (TRNG): Generates unpredictable and unbiased random numbers for cryptographic applications. Advanced Encryption Standard (AES): Provides robust encryption with symmetric key algorithms for securing data. Data Encryption Standard (DES) and Triple DES (3DES): Implement legacy encryption algorithms for data protection. Hash Functions: Includes secure cryptographic hash functions like SHA (Secure Hash Algorithm) for data integrity verification. RSA: Enables secure key exchange, encryption, and digital signatures for secure communication. These cybersecurity IPs are designed to meet the stringent security requirements of modern applications, ensuring the confidentiality, integrity, and authenticity of your data.
Tiempo Secure's True Random Number Generator (TRNG) is a cryptographic IP core designed to infuse high levels of security in digital systems. This module is vital for generating unpredictable random numbers used across various cryptographic functions such as key generation, encryption, digital signatures, and more. The TRNG is crafted to adhere to the highest standards of randomness and security as outlined by NIST and AIS31 test suites. It supports crucial protocols in secure communications like IPsec, MACsec, and TLS/SSL while providing raw data access for AIS31 characterization and incorporating comprehensive health tests. With its ability to integrate seamlessly into existing designs, the TRNG stands as a critical element for enhancing system security. Its implementation includes wrappers for standard buses such as APB and AXI, ensuring compatibility and ease of integration into existing SoC architectures. The TRNG is a cornerstone for secure device operation, ensuring that cryptographic operations maintain their integrity and randomness, thereby safeguarding against potential security breaches in the system.
Akida IP stands as an advanced neuromorphic processor, emulating brain-like processing to efficiently handle sensor inputs at acquisition points. This digital processor offers superior performance, precision, and significant reductions in power usage. By facilitating localized AI/ML tasks, it decreases latency and enhances data privacy. Akida IP is built to infer and learn at the edge, offering highly customizable, event-based neural processing. The architecture of Akida IP is scalable and compact, supporting an extensive mesh network connection of up to 256 nodes. Each node includes four Neural Network Layer Engines (NPEs), configurable for convolutional and fully connected processes. By leveraging data sparsity, Akida optimizes operation reduction, making it a cost-effective solution for various edge AI applications. Including MetaTF support for model simulations, Akida IP brings a fully synthesizable RTL IP package compatible with standard EDA tools, emphasizing ease of integration and deployment. This enables developers to swiftly design, develop, and implement custom AI solutions with robust security and privacy protection.
SphinX offers high-performance and low-latency encryption/decryption through AES-XTS, an industry-standard for data protection. Its independent and non-blocking encryption and decryption channels make it particularly valuable for enhancing data security in high-throughput environments. This technology is crucial for organizations that prioritize data integrity and confidentiality alongside operational efficiency. The SphinX solution ensures that sensitive data is safeguarded without compromising on speed or reliability, making it ideal for applications where both security and performance are critical. Its design allows for seamless integration into existing systems, minimizing the resource drain on processing power while offering robust security features. By focusing on ultra-low latency, SphinX is apt for use in fast-paced environments such as financial services, healthcare, and other sectors dealing with sensitive information. This highlights ZeroPoint Technologies’ commitment to providing cutting-edge solutions that navigate the complexities of modern data security demands, catering to both integrity and speed requirements.
Post-Quantum Cryptography Processing Engine Adds support for lattice-based cryptographic operations such as ML-KEM and ML-DSA. PQPlatform-Lattice provides post-quantum support for these NIST-standardized algorithms with minimal area, and leverages an existing SHA-3 accelerator, powered by PQShield-supplied firmware. It’s designed for minimal area, and maximum compatibility, and is deployed with optional firmware-backed side-channel resistance.
PUFrt serves as a foundational hardware root of trust, featuring advanced key generation and storage capabilities inherent to the chip. It integrates a true random number generator (TRNG) and hardcore anti-tamper protections. With a built-in secure OTP, PUFrt provides unrivaled security for sensitive data, ensuring encryption and decryption processes are secured at the hardware level. This IP is adept at securing the semiconductor supply chain, countering the risks of reverse engineering and ensuring device authenticity through its robust identification systems. PUFrt features extensive customization options and interfaces for integration across diverse architectures, aiming to minimize user effort in embedding security functions within complex systems.
Secure OTP is designed to offer superior data protection through anti-fuse OTP technology. This IP provides comprehensive security for embedded non-volatile memory, suitable for CMOS technologies with robust anti-tamper features. Secure OTP simplifies integration for use across multiple IC markets, offering the ability to secure keys and boot code in major applications like SSDs and smart TVs. The IP leverages a 1024-bit PUF for superior data scrambling and secure memory access, thereby safeguarding critical information present in semiconductor devices. Secure OTP is built to address increasing IoT security concerns and stands out for its versatile application across ASIC and SoC platforms.
The AES Encrypt/Decrypt module offers robust security features, accommodating 128/192/256-bit keys for both encryption and decryption tasks. This module is engineered for low latency and minimal power consumption, making it suitable for high-demand environments where security and performance are critical. The design implements Galois Field calculations using an 8-bit primitive polynomial, enabling parallel processing of key calculation and data encryption to minimize clock cycle use. The flexibility of the module is evident in its runtime programmability, ensuring that each operation can be tailored to meet specific security and performance criteria. Applications span across secure communications and any data exchange requiring high encryption standards, with the system delivering verified RTL against a broad suite of scenarios to guarantee functional integrity.
The Dynamic Neural Accelerator II by EdgeCortix is a pioneering neural network core that combines flexibility and efficiency to support a broad array of edge AI applications. Engineered with run-time reconfigurable interconnects, it facilitates exceptional parallelism and efficient data handling. The architecture supports both convolutional and transformer neural networks, offering optimal performance across varied AI use cases. This architecture vastly improves upon traditional IP cores by dynamically reconfiguring data paths, which significantly enhances parallel task execution and reduces memory bandwidth usage. By adopting this approach, the DNA-II boosts its processing capability while minimizing energy consumption, making it highly effective for edge AI applications that require high output with minimal power input. Furthermore, the DNA-II's adaptability enables it to tackle inefficiencies often seen in batching tasks across other IP ecosystems. The architecture ensures that high utilization and low power consumption are maintained across operations, profoundly impacting sectors relying on edge AI for real-time data processing and decision-making.
Tiempo Secure's Post-Quantum Cryptography (PQC) is designed to offer protection against emerging quantum computing threats, ensuring that cryptographic systems remain secure in the future. This cryptographic solution integrates advanced algorithms that are resilient to quantum attacks, providing a robust next-generation security layer. Key components of the PQC offering include quantum-resistant code signatures, key encapsulation mechanisms, and digital signatures, leveraging advanced algorithms such as the Leighton-Micali Hash-Based Signature Scheme, Crystals-Dilithium, and Crystals-Kyber. These mechanisms are engineered to provide future-proof security, aligning with evolving cryptographic requirements. Tailored for adaptability, PQC ensures dependable security through architecture-ready, hardware-accelerated algorithms that fit into various digital systems. This adaptability makes it suitable for applications seeking enhanced protective measures against quantum threats. With PQC, Tiempo Secure offers a forward-looking approach to securing digital assets, ensuring they are safeguarded from the potential risks posed by quantum computing advancements. This makes it an essential component for modern security strategies, providing peace of mind in a fast-evolving technological landscape.
Creonic delivers advanced Polar Encoders/Decoders that offer high flexibility and efficiency for cutting-edge communications. The company’s Polar solutions capitalize on polar code technology, which is recognized for its channel capacity achievement capabilities in the field of communications. These encoders and decoders are particularly input for Ultra Reliable Low Latency Communications (URLLC), with applications extending to 5G networks and beyond. Creonic’s solution supports various coding rates and code lengths, providing a robust framework for creating customized configurations based on customer specifications. Compatibility with major FPGA platforms allows for seamless integration into existing systems, ensuring optimal performance and scalability across numerous applications. The Polar Encoder/Decoder IP is designed to handle both short and long frames, providing enhanced reliability and ensuring data is efficiently and accurately transmitted over different communication channels.
PUFcc is an advanced crypto coprocessor that combines a hardware root of trust with a full spectrum of cryptographic algorithms. Equipped with the latest security engines, PUFcc is ideal for integrating complex security protocols across various architectures, including IoT and fintech applications. Its design supports TLS communication protocols and features upgraded algorithms for robust performance and augmented security. PUFcc's architecture includes multiple subprocessors and memory access controls, making it a go-to solution for ensuring secure boot and data protection. As a drop-in security IP, it simplifies SoC design processes, ensuring comprehensive, integrated security from the chip to software layers.
Creonic's Turbo Encoders/Decoders offer advanced error correction features for modern digital communication systems. Originating from iterative decoding theory, the turbo codes provided are known for their efficiency and performance close to Shannon’s limit. These encoders and decoders come in various configurations to suit both existing and emergent network standards such as DVB-RCS2 and 4G LTE. Engineered with scalability in mind, Creonic's Turbo solutions support a wide range of data rates and frame sizes, making them a flexible choice for operators targeting satellite or terrestrial networks. Their modular design ensures easy integration and adaptability across various digital platforms and communication technologies. The products maintain high data integrity, enabling reliable data delivery even in high-noise environments. Creonic ensures that each turbo code solution is compliant with international standards, providing a seamless interoperability experience across diverse network architectures.
FortiCrypt is FortifyIQ's premier product focused on providing ultra-high-level security with unprecedented efficiency. It encompasses a suite of AES solutions that protect against side-channel and fault injection attacks, including SIFA, without compromising on speed, performance, or physical dimensions. The technology harnesses finite field arithmetic for masking methods, safeguarding against attacks while maintaining low latency and high performance, evidenced by its ability to perform at hundreds of Gbps rates. This IP core supports a wide array of configurations, including ultra-low power and ultra-compact modes, making it versatile for battery-powered and space-constrained applications. Tested rigorously using the TVLA methodology, FortiCrypt ensures robust protection across diverse environments, from IoT devices to critical infrastructure.
Creonic's LDPC Encoders/Decoders are engineered to deliver high throughput and low latency for communications and data applications. The exceptional performance of these encoders and decoders ensures that they are ideally suited for applications such as satellite communications, broadband wireless, and high-speed networking. Creonic provides a comprehensive range of LDPC solutions that can be customized to match various standards, including DVB-S2X, 5G NR, IEEE, and CCSDS. Each LDPC solution is robustly engineered, offering maximum flexibility to adapt to different code rates and frame sizes. These cores are implemented to ensure compatibility with diverse FPGA platforms like Xilinx and Intel. Customers benefit from a solid framework that integrates efficient encoding and decoding mechanisms, ensuring reliable data transfer across challenging communication environments. The LDPC products stand out for their superior error correction capabilities, which help in mitigating the adverse effects of signal degradation. Creonic's solutions target both existing and emerging communications standards, ensuring future-proof reliability and performance enhancement.
The 100 Gbps Polar Encoder and Decoder is engineered for the next-generation communication systems demanding ultra-high data rates and reliability. It employs Polar coding, a recent advancement in code theory, which provides a capacity achieving solution to enhance data transfer efficiency in modern networks, particularly suitable for 5G technologies. This IP core supports data rates up to 100 Gbps, enabling rapid data encoding and decoding essential for high-speed communication backbones. The technology ensures robust error correction and maximal utilization of spectral resources by leveraging the power of Polar code combined with optimized algorithmic implementations. Strategically designed for industry-leading performance, this Polar Encoder and Decoder is applicable in systems where bandwidth efficiency and processing speed are critical. It is highly applicable to the telecommunication industries involved in mobile networks, data centers, and any large-scale data streaming operations.
The PSA Compliant Crypto API by Tiempo Secure offers a streamlined interface for implementing cryptographic functions, ensuring robust digital security. It is a comprehensive package that simplifies cryptographic operations while adhering strictly to the Platform Security Architecture (PSA) benchmarks. Engineered for efficiency, the API provides a software library supporting both Physical Unclonable Functions (PUFs) and a True Random Number Generator with Deterministic Random Bit Generator (TRNG+DRBG). Its design ensures minimal on-chip SRAM usage, occupying only a few kilobytes, ideal for space-constrained environments. Platforms integrating this API can achieve the prestigious 'PSA Certified Storage' status, proving compliance with stringent standards. Its extensive logging options, highly optimized SHA-256, and adherence to MISRA C standards make it a robust choice for enhancing system security. This API enables secure storage of arbitrary keys using SRAM PUFs and supports the generation of 256-bit true random seeds, vital for secure operating environments. It simplifies complex security functions, making it an ideal choice for enhancing system protection across various platforms.
The Polar ID Biometric Security System represents a major innovation in smartphone security, offering a simplified yet highly secure face unlock solution. Unlike traditional systems, Polar ID uses breakthrough meta-optic technology to capture the unique 'polarization signature' of a face, enabling it to detect and prevent spoofing attempts with exceptional accuracy. This system provides more than 10 times the resolution of existing facial authentication solutions, functioning reliably under various light conditions, from bright daylight to complete darkness. It achieves this with a single low-profile near-infrared polarization camera and a 940nm illumination source, eliminating the need for bulky and expensive optical modules. Furthermore, the Polar ID not only reduces the required footprint of the technology, allowing it to fit into more compact form factors, but it also lowers costs, making secure face recognition accessible to a broader range of devices. This advancement in biometric technology is particularly valuable for mobile and consumer electronics, offering enhanced security without sacrificing convenience. The Polar ID sets a new benchmark for mobile security solutions with its unique combination of size, security, and cost-efficiency.
The THOR Toolbox by Presto Engineering is a specialty toolbox that integrates NFC and UHF connectivity, designed to expedite the development and testing of wireless communication interfaces within ASIC designs. This IP supports wireless sensor connectivity and effective RF interfacing through a combination of analog and digital interface methodologies, providing a versatile platform for rapid prototyping and proof-of-concept creation. Engineered to facilitate direct NFC communication and UHF signal reception, the THOR Toolbox allows for efficient data transmission in demanding environments, offering flexibility for integration into various communication protocols and systems. Its design encompasses features aimed at lowering power consumption while maintaining robust connectivity capabilities, which are critical in evolving IoT applications and modern electronic systems. By leveraging the THOR Toolbox, developers can benefit from an accelerated pathway to test, verify, and implement high-performance NFC and UHF solutions. This toolbox serves as a powerful resource in enabling swift adaptation to market needs and is particularly well-suited for applications requiring dependable wireless interaction, such as asset tracking and contactless payment systems.
The Alcora V-by-One HS FMC daughter card by Parretto facilitates the integration of V-by-One HS interfaces into FPGA systems with ease. It provides 8 RX and 8 TX lanes, allowing for a total of 16 lanes when two cards are used, capable of supporting 4K resolutions at 120Hz, or 8K at 30Hz. Designed for versatility, Alcora comes in two configurations: 51-pin and 41-pin headers. Built for stability, it includes two clock generators to synthesize the transceiver reference clock and reduce jitter, optimizing digital video transmission over the high-speed interface. V-by-One HS technology, developed by THine Electronics, Inc., positions the Alcora card as a prime component for high-resolution video and flat panel display markets, bridging the gap between superior video outputs and a variety of digital displays.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
Creonic’s Miscellaneous FEC and DSP IP Cores are an essential toolkit for enhancing digital signal processing capabilities across various fields. These include solutions like Viterbi Decoders, FFT/IFFT processors, and advanced BCH code implementations, which are cornerstones in data correction and signal processing. These DSP cores are engineered for high performance and efficiency, vital for applications demanding robust signal integrity and processing speed. From Doppler Channel processing found in satellite and radio communications to sophisticated stream processing in broadband networks, every core is fine-tuned for specific performance requirements. Creonic provides adaptable designs that are geared for seamless integration into existing platforms, ensuring continued enhancement of network efficiency and data reliability. The flexibility of these cores means they can be tailored to fit diverse operational standards, making them invaluable in meeting complex communication challenges.
The eSi-Crypto suite from EnSilica encompasses a comprehensive range of cryptographic IPs targeted for ASIC and FPGA designs. This suite features low resource consumption and high throughput, crucial for secure and efficient cryptographic solutions. A key component is a robust True Random Number Generator (TRNG) compliant with NIST 800-22, available only as a hard macro. This IP provides essential cryptographic functions such as encryption, decryption, and authentication using algorithms like AES, RSA, ECC/ECDSA, and many more. Designed to cater to the evolving threat of quantum computing, this IP supports post-quantum cryptographic algorithms to future-proof data security. These cryptographic tools are integrated as standalone IPs or come with AMBA AHB/AXI bus interfaces, enabling seamless incorporation into a wide range of customized or standardized security applications across industries.
The Post-Quantum Cryptography (PQC) IP from Secure-IC offers solutions resilient against quantum computing threats. The PQC IP includes a hybrid hardware-software model that enables scalable security across various applications. It forms part of Secure-IC's forward-looking approach to cybersecurity that emphasizes both hardware accelerators and software libraries, which execute key generation and encapsulation with protection against side-channel attacks. This kind of versatility in cryptography makes it an excellent choice for next-generation secure communication platforms.
The SHA-2 Crypto Engine from Tiempo Secure delivers advanced hashing functionality that is pivotal for ensuring data integrity and security in various applications. This IP core stands out for its efficient processing capabilities, supporting hashing functions like SHA-256 and SHA-224. Designed with a 1 cycle per round architecture, the SHA-2 Crypto Engine supports both the import and export of SHA-256 states, catering to even the most complex cryptographic operations. Its ability to handle any message length with bit granularity makes it versatile for wide-ranging applications. Internal padding is seamlessly handled within the IP, and for ease of integration, it comes with wrappers for standard buses such as APB and AXI. This ensures it fits well into a plethora of existing designs, making it a reliable choice for implementing digital signatures and data integrity checks. A unique feature of the SHA-2 Crypto Engine is its readiness to handle pre-padded payloads, optimizing processing without compromising on performance. It empowers developers to boost their system's security robustness while benefiting from an optimized silicon resource-to-performance ratio.
The AES-XTS solution by Helion is tailored for disk encryption, leveraging the Tweakable block cipher algorithm to provide enhanced data security at the sector level on storage devices. The AES-XTS mode is designed to prevent threats like copy-and-paste or dictionary attacks and can independently encrypt and decrypt data in sector-sized blocks. This encryption core is crucial for safeguarding sensitive data on storage arrays, ensuring that identical plaintext blocks placed at different sectors result in distinct ciphertext. Helion offers a variety of AES-XTS cores to address differing data throughput needs, with capabilities ranging from less than 1Gbps to over 64Gbps, making it suitable for singular hard disks to large server arrays. Helion's AES-XTS solutions can be deployed on both ASIC and FPGA platforms, ensuring maximum performance and resource efficiency across varied technological landscapes. They support key sizes of 128-bit and 256-bit, with options for Ciphertext Stealing, adapting to diverse encryption protocols and operational environments.
The Cramium Personal Hardware Security Module (PHSM) from Crossbar is an advanced security solution designed to safeguard digital assets with unparalleled protection. With a unique architecture that combines high-security with ease of use, this module is an integrated single-chip platform capable of executing complex cryptographic computations while ensuring the utmost security of sensitive data like private keys. The PHSM is engineered to perform Multi-Party Computation (MPC) within its secure element, thereby avoiding exposure of key shares, and supports Zero-Knowledge Proof (ZKP) to enhance data protection without unnecessary compromise. Designed to fit into various usage scenarios, from institutional cryptocurrency management to personal security devices, the Cramium PHSM offers a range of key management configurations, including BIP32/39, Multi-Signature wallets, and FIDO2 passkey support. By remaining offline when not actively used, it provides robust safeguarding against unauthorized accesses, marking it as an ideal choice for high-stakes custodianship and secure storage needs. Beyond its traditional usage, the PHSM's capacity for customization and compliance with various protocols places it as a versatile choice for protecting digital identities and assets, suitable for both end-user applications and enterprise-level security systems. This reliability makes it an essential tool for organizations seeking to bolster their defenses amidst increasing cyber threats, particularly those necessitating two-factor authentication and cryptographic safeguards.
SystemBIST represents a comprehensive plug-and-play device enhancing FPGA configurations and embedded JTAG testing methodologies on PCBs. This sophisticated module allows for seamless FPGA device programming and reconfiguration in-field, supporting IEEE 1532 and IEEE 1149.1 standards. Designed with a vendor-independent approach, SystemBIST offers scalable configurations for both flash memory and CPLD devices, integrating built-in self-tests (BIST) that utilize stored test patterns in flash memory. This product simplifies the traditional complex methods of FPGA configuration, removing the need for large PROM parts and streamlining production concerns with its cost-effective design, widening its appeal across sectors needing flexible, reliable re-programmable solutions.
aiWare represents a specialized hardware IP core designed for optimizing neural network performance in automotive AI applications. This neural processing unit (NPU) delivers exceptional efficiency for a spectrum of AI workloads, crucial for powering automated driving systems. Its design is focused on scalability and versatility, supporting applications ranging from L2 regulatory tasks to complex multi-sensor L3+ systems, ensuring flexibility to accommodate evolving technological needs. The aiWare hardware is integrated with advanced features like industry-leading data bandwidth management and deterministic processing, ensuring high efficiency across diverse workloads. This makes it a reliable choice for automotive sectors striving for ASIL-B certification in safety-critical environments. aiWare's architecture utilizes patented dataflows to maximize performance while minimizing power consumption, critical in automotive scenarios where resource efficiency is paramount. Additionally, aiWare is supported by an innovative SDK that simplifies the development process through offline performance estimation and extensive integration tools. These capabilities reduce the dependency on low-level programming for neural network execution, streamlining development cycles and enhancing the adaptability of AI applications in automotive domains.
Tiempo Secure's SHA-3 Crypto Engine is an advanced cryptographic module that offers exceptional flexibility and performance for modern security needs. Emphasizing scalability, the engine supports varying numbers of hashing rounds per clock cycle, optimizing the silicon resource usage while ensuring high throughput. One of the key features is the ability to select between fixed-length and extendable-output functions (XOF) for each message, catering to diverse application requirements. This flexibility is easily manageable through simple configuration settings, making it adaptable to specific needs. Internally, the SHA-3 engine manages message padding and allows for efficient import/export of the KECCAK-p state. The architecture is designed for integration simplicity, featuring wrappers compatible with standard bus protocols like APB and AXI, facilitating smooth incorporation into a myriad of systems. In addition to supporting SHA-3 standard functions, it accelerates the Kangaroo Twelve algorithm, offering a comprehensive suite of cryptographic tools for enhanced data security and integrity across various applications.
Alma Technologies' AES Block Cipher IP delivers comprehensive cryptographic solutions, integrating the most popular cipher modes like ECB, CBC, CFB, OFB, and CTR. This robust IP core is designed to handle encryption and decryption processes with high fidelity and minimal resource use, making it suitable for use in various ASIC and FPGA applications. Offering support for GCM authenticated encryption and additional key expansion, the AES Block Cipher IP increases security and operational versatility. It allows customizable configurations based on project requirements, ensuring adaptability to specific security protocols in broad-ranging applications. Its efficient and compact design focuses on optimized performance and ease of integration into existing frameworks, ensuring superior security measures are expediently implemented without compromising system functionality or resource allocation.
FortiMac provides a reliable HMAC SHA2 IP core solution with advanced resistance against DPA and FIA, utilizing a minimal number of digital gates for an efficient security measure. Its underlying protection is built on the Threshold Implementation strategy, which offers formidable resistance against SCA and FI attacks. This IP stands out as the sole market component offering pure software solutions with robust algorithmic safeguards. FortiMac effectively supports various SHA schemes and ensures SCA and FIA protection on multiple processor architectures, making it adaptable for a range of applications including secure communications and automotive systems.
AndeSoft SW Stack encompasses a comprehensive set of software building blocks and middleware optimized for AndesCore processors. This rich collection includes operating systems, libraries, drivers, and middleware components, all meticulously designed to enhance software development speed and quality. By providing ready-to-use components, AndeSoft enables developers to focus on crafting their application-specific solutions, significantly reducing time-to-market. Its seamless integration with AndeSight IDE further enhances development efficiency, supporting diverse operating systems and being adaptable to various processor configurations for optimal performance.
FortiPKA-RISC-V is a specialized public key accelerator that enhances the performance of complex cryptographic operations while ensuring protection against SCA and FIA threats. Designed for embedded systems and IoT devices, this IP employs modular multiplication and eliminates the need for Montgomery domain transformations, thereby streamlining operations and optimizing area usage. It offers an extensive support for a variety of cryptographic algorithms, including RSA and ECC, providing a comprehensive cryptographic capability suitable for a range of security-intense applications. This product is engineered to enhance data protection while improving system performance, crucial for compliance with demanding industry standards.
Securyzr Integrated Security Services Platform (iSSP) is a comprehensive lifecycle management solution. This platform allows Secure-IC's clients to monitor, manage, and secure their embedded devices throughout their operational lifecycle. It enables provisioning, firmware updates, security monitoring, and device identity management with high ease and trustworthiness. This solution facilitates zero-touch lifecycle services, significantly enhancing the security posture of device fleets in dynamic environments, thus demanding minimal interruption in ongoing operations.
Post-Quantum Cryptography Processing Engine Adds support for lattice-based cryptographic operations such as ML-KEM and ML-DSA. PQPlatform-Lattice provides post-quantum support for these NIST-standardized algorithms with minimal area, and leverages an existing SHA-3 accelerator, powered by PQShield-supplied firmware. It’s designed for minimal area, and maximum compatibility, and is deployed with optional firmware-backed side-channel resistance.
The DK8x02 Evaluation Kit (EVK) is an essential tool for battery developers and BMS designers to explore the capabilities of the Dukosi Cell Monitoring System. Within minutes, users can set up a cell network using the intuitive software environment provided. The kit includes numerous components necessary for developing and testing next-generation battery solutions, offering comprehensive support and documentation for seamless integration.
The Dukosi Cell Monitoring System (DKCMS) is a sophisticated solution for optimizing battery systems. Tailored for high-performance batteries, it transforms how battery systems operate. At its core, each battery cell is equipped with a DK8102 Cell Monitor, providing critical measurements of voltage and temperature. Communication is facilitated through Dukosi’s proprietary C-SynQ protocol, ensuring deterministic data transfer and enhancing safety in dynamic environments.
The AES Encryption for RFID applications is engineered to provide robust security for data in RFID communications. Utilizing Advanced Encryption Standard (AES) techniques, it offers a secure and efficient mechanism for protecting sensitive information transmitted in RFID systems. This encryption solution is ideal for applications where data integrity and confidentiality are paramount, protecting against unauthorized access and ensuring secure wireless transactions.
The G13 and G13X IP cores are engineered to accomplish 512-bit correction blocks, which are commonly used in NAND devices with 2KB and 4KB page sizes. As SLC NAND transitions toward smaller geometries, this IP extends existing controller capabilities to meet more demanding ECC requirements. Not only available in standard configurations, Cyclic Design can tailor this IP to perfectly align with the specific needs of any controller hardware, addressing latency, bandwidth, and area prerequisites.
Ocean Logic's AES Encryption Core represents a robust and reliable solution for securing data across numerous platforms. Renowned for its certification and extensive validation in silicon on both FPGA and ASIC, this IP core has established credibility and trust among a diversified customer base. The AES core has seen nearly 60 successful implementations, underlining its reliability in providing robust data security. This encryption core complies with stringent security standards, ensuring data integrity and confidentiality. It is subject to Australia's Export Control regulations, qualifying it for international deployment across numerous key markets worldwide. Such widespread recognition indicates its versatility and adaptability to meet various encryption needs. For businesses and organizations prioritizing data security, Ocean Logic's AES Encryption Core offers a proven, high-performance solution. Its design facilitates seamless integration into existing systems, providing a comprehensive encryption capability while maintaining operational efficiency. The IP core stands as an ideal choice for companies looking to fortify their security measures with a trusted, efficient, and scalable encryption architecture.
Post-Quantum Security Subsystem A cryptographic subsystem, designed to provide cryptographic services. These services include post-quantum signature generation, verification, and secure key establishment. PQPlatform-SubSys uses its built-in CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
The Quantum Resistant Encryption Core is designed to offer robust security against emerging quantum threats. It features algorithms curated to withstand quantum computing capabilities, thus ensuring that sensitive information remains safeguarded. The solution forms an integral part of Crypto Quantique’s security architecture, leveraging their deep understanding of cryptographic principles to fortify device security. This core employs high-level encryption standards and is developed to support rapid integration into existing digital infrastructures. One of its standout features is its adaptability, meaning it can be implemented across a range of devices and platforms with minimal disruption. This versatility is crucial given the diverse nature of devices within the IoT ecosphere. Moreover, the Quantum Resistant Encryption Core is engineered with performance in mind, efficiently managing resources to ensure that security does not come at the expense of processing speed or energy consumption. Incredible resilience against future threats is provided by the integration of post-quantum cryptographic standards. Traditional cryptographic methods face significant risks as quantum computing technology becomes more prevalent, making quantum-resistant solutions imperative for long-term security strategy. This core solution by Crypto Quantique thus ensures devices remain protected well into the future, maintaining the integrity and confidentiality of data.
The SOQPSK-TG LDPC Modulator supports advanced modulating techniques tailored for aerospace telemetry applications. This modulator utilizes Spectrally Efficient Constant Envelope Modulation with a highly efficient LDPC (Low-Density Parity-Check) coding scheme that ensures reliable data transmission even in challenging conditions. Built for robust performance, it integrates seamlessly with modern communication systems to enhance signal integrity and data throughput. Engineered for precision, this modulator offers low error rates by leveraging sophisticated LDPC algorithms, thereby optimizing network capacity and spectral efficiency. It is ideal for systems requiring high resilience against signal degradation, such as satellite and telemetry networks. Equipped with cutting-edge encoding technology, the SOQPSK-TG LDPC Modulator is designed to operate over a wide range of frequency bands, making it adaptable for various telemetry and aerospace applications. Its compact architecture allows for easy integration into existing infrastructures, thus facilitating quick deployment and operational flexibility.
The AES (standard modes) product from Helion offers a robust encryption solution featuring the Advanced Encryption Standard (AES) algorithm, a 128-bit block cipher known for its efficiency and security. With key sizes of 128, 192, and 256 bits, the AES algorithm complies with NIST standards and is recognized globally for securing sensitive information. This product caters to applications necessitating rapid data processing and heightened security, such as in IPsec, wireless communication, and storage encryption. Helion's AES cores are crafted to deliver optimal performance across a vast array of settings, including both ASIC and FPGA implementations. The cores are designed with scalability in mind, accommodating applications from minimal data rates up to multi-gigabit transmission speeds. Thanks to their architecture, these cores maintain high usability, enabling easy adoption and integration into user systems without excessive resource allocation. Helion's AES suite includes numerous versions tailored to meet varying data transmission needs, ensuring adaptability in resource-constrained environments. Users benefit from the choice of low-power, space-efficient, and high-speed solutions, supporting a wide range of encryption requirements. These cores are also compatible with an array of programmable technologies, reaffirming their utility across diverse platforms, from commercial applications to government-level data protection setups.
Post-Quantum Cryptography Processor PQPlatform-CoPro (PQP-HW-COP) adds PQShield’s state-of-the-art post-quantum cryptography (PQC) to your security sub-system, with optional side-channel countermeasures (SCA). PQPlatform-CoPro can be optimized for minimum area as part of an existing security sub-system. PQPlatform-CoPro is designed to be run by an existing CPU in your security system, using PQShield’s supplied firmware.
Post-quantum Software Development Kit Provides easy-to-use software implementations of both post-quantum and classical cryptographic primitives. It’s designed with prototyping and experimentation in mind, consisting of an integration of PQShield’s PQCryptoLib library with two popular high-level cryptography libraries: OpenSSL and mbedTLS. OpenSSL: a widely-adopted secure-communication library mbedTLS: primarily intended for use in embedded system and IoT deployments
The SFA 100 Edge IoT Data Processing solution offers streamlined data handling for IoT applications at the edge. It is optimized to efficiently process data collected from various IoT devices, ensuring quick and effective data transfer and analysis locally. This solution supports intelligent data processing near the source, which is critical for reducing latency and bandwidth usage in IoT networks.
The Yuzhen 600 is a highly efficient RFID chip designed for robust IoT applications. This chip provides swift and accurate transmission of data, making it an ideal choice for inventory management and tracking systems. Its architecture emphasizes energy efficiency, ensuring prolonged operational life in the field. Yuzhen 600's advanced communication protocols support seamless integration into various IoT networks, enhancing system performance and reliability.
The G12 is a highly optimized BCH error correction solution focused on 256-byte correction blocks. Particularly beneficial for specialized applications that require smaller block sizes, this IP offers dynamic flexibility with block sizes ranging from 2 to 450 bytes. Users can maximize area efficiency by specifying the ECC level, supporting both single and multi-channel configurations. Delivered as Verilog source with SystemVerilog Assertions, the G12 can accommodate higher ECC levels upon request.