All IPs > Security IP > Cryptography Cores
In today's interconnected world, the importance of secure communication and data protection cannot be overstated. Cryptography cores are a crucial subset of semiconductor IPs designed to provide foundational security solutions across a variety of electronic systems. At their core, these IPs implement complex algorithms that ensure the confidentiality, integrity, and authenticity of data being processed and exchanged.
The cryptography cores available in this category offer a diverse range of features tailored to different security needs. From symmetric-key algorithms like AES to asymmetric-key systems such as RSA and ECC, these cores ensure that systems can securely encrypt and decrypt information, protecting it from unauthorized access and tampering. By embedding these cryptographic functions directly into hardware, it becomes possible to achieve faster processing speeds and higher levels of security compared to software implementations.
These semiconductor IPs are widely used in applications where data security is paramount. This includes, but is not limited to, industries such as finance, telecommunications, and healthcare. Devices utilizing cryptography cores can range from secure payment systems, ensuring safe financial transactions, to mobile devices for secure communications, to medical devices that safeguard sensitive health information. Additionally, with the rise of the Internet of Things (IoT), cryptography cores are increasingly crucial in providing secure connections for a myriad of smart devices.
By integrating cryptography cores into your designs, you not only improve security but also future-proof your products against many potential vulnerabilities. As security threats continue to evolve, having robust cryptography solutions is essential for maintaining trust and reliability in your products and services. Whether you're developing a new application or enhancing an existing one, our category of cryptography cores offers the semiconductor IP solutions you need to meet today's stringent security demands.
Overview: Cybersecurity IPs offer a range of essential security features to protect your digital assets and sensitive information. From True Random Number Generators (TRNG) to advanced encryption algorithms like AES, DES, 3DES, and cryptographic hash functions like SHA, as well as RSA for secure key exchange and digital signatures, the IPs provide a comprehensive suite of tools to safeguard your data. Key Features: True Random Number Generator (TRNG): Generates unpredictable and unbiased random numbers for cryptographic applications. Advanced Encryption Standard (AES): Provides robust encryption with symmetric key algorithms for securing data. Data Encryption Standard (DES) and Triple DES (3DES): Implement legacy encryption algorithms for data protection. Hash Functions: Includes secure cryptographic hash functions like SHA (Secure Hash Algorithm) for data integrity verification. RSA: Enables secure key exchange, encryption, and digital signatures for secure communication. These cybersecurity IPs are designed to meet the stringent security requirements of modern applications, ensuring the confidentiality, integrity, and authenticity of your data.
Post-Quantum Cryptography Processing Engine Adds support for lattice-based cryptographic operations such as ML-KEM and ML-DSA. PQPlatform-Lattice provides post-quantum support for these NIST-standardized algorithms with minimal area, and leverages an existing SHA-3 accelerator, powered by PQShield-supplied firmware. It’s designed for minimal area, and maximum compatibility, and is deployed with optional firmware-backed side-channel resistance.
BrainChip's Akida IP is an innovative neuromorphic processor that emulates the human brain's functionalities to analyze essential sensor inputs at the acquisition point. By maintaining AI/ML processes on-chip, Akida IP minimizes cloud dependency, reducing latency and enhancing data privacy. The scalable architecture supports up to 256 nodes interconnected over a mesh network, each node equipped with configurable Neural Network Layer Engines (NPEs). This event-based processor leverages data sparsity to decrease operational requirements significantly, which in turn improves performance and energy efficiency. With robust customization and the ability to perform on-chip learning, Akida IP adeptly supports a wide range of edge AI applications while maintaining a small silicon footprint.
Polar ID offers an advanced solution for secure facial recognition in smartphones. This system harnesses the revolutionary capabilities of meta-optics to capture a unique polarization signature from human faces, adding a distinct layer of security against sophisticated spoofing methods like 3D masks. With its compact design, Polar ID replaces the need for bulky optical modules and costly time-of-flight sensors, making it a cost-effective alternative for facial authentication. The Polar ID system operates efficiently under diverse lighting conditions, ensuring reliable performance both in bright sunlight and in total darkness. This adaptability is complemented by the system’s high-resolution capability, surpassing that of traditional facial recognition technologies, allowing it to function seamlessly even when users are wearing face coverings, such as glasses or masks. By incorporating this high level of precision and security, Polar ID provides an unprecedented user experience in biometric solutions. As an integrated solution, Polar ID leverages state-of-the-art polarization imaging, combined with near-infrared technology operating at 940nm, which provides robust and secure face unlock functionality for an increasing range of mobile devices. This innovation delivers enhanced digital security and convenience, significantly reducing complexity and integration costs for manufacturers, while setting a new standard for biometric authentication in smartphones and beyond.
The NaviSoC is a cutting-edge system-on-chip (SoC) that integrates a GNSS receiver and an application processor on one silicon die. Known for its high precision and reliability, it provides users with a compact and energy-efficient solution for various applications. Capable of supporting all GNSS bands and constellations, it offers fast time-to-first-fix, centimeter-level accuracy, and maintains high sensitivity even in challenging environments. The NaviSoC's flexible design allows it to be customized to meet specific user requirements, making it suitable for a wide range of applications, from location-based services to asset tracking and smart agriculture. The incorporation of a RISC-V application microcontroller, along with an array of peripherals and interfaces, introduces expanded functionality, optimizing it for advanced IoT and industrial applications. Engineered for power efficiency, the NaviSoC supports a range of supply voltages, ensuring low power consumption across its operations. The chip's design provides for efficient integration into existing systems with the support of a comprehensive SDK and IDE, allowing developers to tailor solutions to their precise needs in embedded systems and navigation infrastructures.
PUFrt stands as a bastion of semiconductor security, serving as a Hardware Root of Trust (HRoT) with unparalleled credibility. Its architecture is designed to generate and store hardware root keys securely within the chip, utilizing Physically Unclonable Functions (PUF) and a true random number generator (TRNG). These features ensure that cryptographic operations are fortified with a unique and unclonable identity, mitigating risks of physical tampering and creating a robust defense against reverse engineering.<br><br>Integral to its design is the secure OTP (One-Time Programmable) memory, which stores sensitive keys and data, adding a layer of protection that has been validated through rigorous security certifications. The PUFrt's anti-tamper technology guards against unauthorized access, ensuring the integrity of both hardware and software environments. Moreover, its design facilitates easy integration with various system architectures, expanding its applications beyond traditional security implementations.<br><br>Applications of PUFrt span from IoT devices to sophisticated computing systems, where its role as a secure entry point into connected ecosystems is crucial. By embedding a secure foundation, PUFrt not only strengthens semiconductor reliability but also enhances performance efficiency. This holistic approach to security makes it a linchpin in modern semiconductor design, supporting each stage of the device lifecycle with comprehensive, hardware-anchored security protocols.
The DAES processor is an ultra-secure cryptographic co-processor that efficiently implements the Rijndael encryption algorithm. This processor provides robust support for both 128 and 256-bit key lengths, while also facilitating a variety of block cipher modes such as ECB, CBC, and other standards. It incorporates an internal key expansion module to guarantee prompt and secure data encryption processes, positioning it as a vital asset for environments where data confidentiality is paramount. By integrating smoothly via APB, AHB, and AXI bus interfaces, it adapts seamlessly across differing systems requiring top-tier security.
The Dynamic Neural Accelerator (DNA) II offers a groundbreaking approach to enhancing edge AI performance. This neural network architecture core stands out due to its runtime reconfigurable architecture that allows for efficient interconnections between compute components. DNA II supports both convolutional and transformer network applications, accommodating an extensive array of edge AI functions. By leveraging scalable performance, it makes itself a valuable asset in the development of systems-on-chip (SoC) solutions. DNA II is spearheaded by EdgeCortix's patented data path architecture, focusing on technical optimization to maximize available computing resources. This architecture uniquely allows DNA II to maintain low power consumption while flexibly adapting to various task demands across diverse AI models. Its higher utilization rates and faster processing set it apart from traditional IP core solutions, addressing industry demands for more efficient and effective AI processing. In concert with the MERA software stack, DNA II optimally sequences computation tasks and resource distribution, further refining efficiency and effectiveness in processing neural networks. This integration of hardware and software not only aids in reducing on-chip memory bandwidth usage but also enhances the parallel processing ability of the system, catering to the intricate needs of modern AI computing environments.
The HDCP Encryption-Decryption Engine developed by Trilinear Technologies is designed to protect digital audio and video content from unauthorized access during transmission. It aligns with the HDCP 2.2 standard, ensuring that all data exchanged between a display source and receiver remains secure and resistant to interception. This solution is vital for industries where content protection is paramount, such as in premium consumer electronics, professional audiovisual setups, and sensitive government or military communication channels. This engine supports the authentication protocols necessary for protected transactions over DisplayPort interfaces, using sophisticated AUX channels to seal data transfer securely. It is engineered to reduce the processing load by offloading encryption tasks from the system processor, thereby enhancing the overall system performance while maintaining robust security. Capable of integrating into a range of devices from set-top boxes to large multimedia systems, the HDCP Encryption-Decryption Engine offers developers a trustworthy method to shield content from piracy and unauthorized dissemination. Its implementation ensures that content providers can operate freely with the assurance that their digital rights are upheld across all endpoints.
The eSi-Crypto suite offers a comprehensive set of encryption and authentication solutions, optimized for ASIC and FPGA applications with low resource demands and high throughput. It features essential components such as a True Random Number Generator (TRNG), compliant with NIST 800-22, available as a hard macro. The IP includes a variety of encryption algorithms including CRYSTALS Kyber, CRYSTALS Dilithium, ECC/ECDSA, RSA, AES, and SHA1-SHA3. These algorithms are designed for robust security and can be integrated as standalone cores or with AMBA APB/AHB or AXI bus interfaces, serving diverse applications like secure communications and financial transactions.
Secure OTP offers a groundbreaking approach to data protection in semiconductor chips, employing an anti-fuse OTP memory to safeguard sensitive information. By combining hardware macros with digital RTL, it meticulously protects data at rest, in transit, or in use, making it a cornerstone of modern chip design. Its architecture supports various integrations across IC applications, providing robust and adaptable security solutions tailored for diverse markets.<br><br>This technology elevates the standard OTP solutions by incorporating advanced hardware encryption mechanisms and tamperproof designs. Secure OTP's seamless integration into multiple systems underscores its versatility, catering to demands across sectors such as automotive, industrial, and consumer electronics. Users benefit from secure key management and enhanced data integrity, mitigating the potential risks of traditional storage vulnerabilities.<br><br>The design philosophy behind Secure OTP centers on preventing data leakage, particularly for IoT devices that are prone to attacks. As devices face the growing menace of cyber threats, Secure OTP scales to meet these challenges head-on, providing fortified data storage solutions that are resistant to physical attacks and environmental variations. With the rising importance of secure encrypted storage, Secure OTP's role is vital in maintaining the integrity and confidentiality of critical chip information.
DolphinWare IPs is a versatile portfolio of intellectual property solutions that enable efficient SoC design. This collection includes various control logic components such as FIFO, arbiter, and arithmetic components like math operators and converters. In addition, the logic components span counters, registers, and multiplexers, providing essential functionalities for diverse industrial applications. The IPs in this lineup are meticulously designed to ensure data integrity, supported by robust verification IPs for AXI4, APB, SD4.0, and more. This comprehensive suite meets the stringent demands of modern electronic designs, facilitating seamless integration into existing design paradigms. Beyond their broad functionality, DolphinWare’s offerings are fundamental to applications requiring specific control logic and data integrity solutions, making them indispensable for enterprises looking to modernize or expand their product offerings while ensuring compliance with industry standards.
aiWare stands out as a premier hardware IP for high-performance neural processing, tailored for complex automotive AI applications. By offering exceptional efficiency and scalability, aiWare empowers automotive systems to harness the full power of neural networks across a wide variety of functions, from Advanced Driver Assistance Systems (ADAS) to fully autonomous driving platforms. It boasts an innovative architecture optimized for both performance and energy efficiency, making it capable of handling the rigorous demands of next-generation AI workloads. The aiWare hardware features an NPU designed to achieve up to 256 Effective Tera Operations Per Second (TOPS), delivering high performance at significantly lower power. This is made possible through a thoughtfully engineered dataflow and memory architecture that minimizes the need for external memory bandwidth, thus enhancing processing speed and reducing energy consumption. The design ensures that aiWare can operate efficiently across a broad range of conditions, maintaining its edge in both small and large-scale applications. A key advantage of aiWare is its compatibility with aiMotive's aiDrive software, facilitating seamless integration and optimizing neural network configurations for automotive production environments. aiWare's development emphasizes strong support for AI algorithms, ensuring robust performance in diverse applications, from edge processing in sensor nodes to high central computational capacity. This makes aiWare a critical component in deploying advanced, scalable automotive AI solutions, designed specifically to meet the safety and performance standards required in modern vehicles.
802.11 LDPC offers a highly efficient solution for wireless communication systems, ensuring high throughput and dynamic configuration. The design allows frame-to-frame configuration, optimizing the trade-off between throughput and error correction performance. Meeting stringent bit-error-rate and packet-error-rate specifications, this technology is ideal for robust communication systems requiring reliable data transmission.
This core focuses on providing robust encryption standards, ensuring data protection and secure communications in various applications. Built with enhanced fault resilience, it aims to ensure data integrity even when faced with logic errors. The AES Core is designed to handle complex industrial and consumer encryption needs efficiently.
The Alcora V-by-One HS Daughter Card is tailored for high-speed digital interfacing, specifically aligning with FPGA development boards via FMC connectors. The card features 8 RX and 8 TX lanes, with the option to combine two FMC cards for a total of 16 lanes. This configuration supports video resolutions up to 4K at 120Hz or 8K at 30Hz, demonstrating its capability to handle large volumes of data efficiently. Designed to meet the demanding requirements of high-resolution and high-frame-rate applications, the Alcora card integrates dual clock generators to optimize signal clarity by synthesizing the transceiver reference clock and minimizing jitter. This characteristic is crucial in maintaining data integrity and ensuring smooth video performance, making the Alcora an optimal choice for flat panel display integration. Featuring flexible connectivity options, the Alcora card is available in both 51-pin and 41-pin header variants. This design ensures that it can provide a comprehensive interface to meet various technical challenges, advancing the capabilities of high-speed digital communications within FPGA systems.
Securyzr iSSP is a versatile platform that aims to provide a comprehensive security lifecycle management solution. This embedded security service platform ensures that devices are protected from the chip level throughout their lifecycle. It features security operations like secure boot, firmware updates, and intrusion detection, all managed from the cloud, enabling secure deployment and management across fleets of devices. Its design caters to complex security challenges by offering a scalable, end-to-end solution for managing device security without manual intervention, known as zero-touch security services. The Securyzr iSSP is optimized to handle critical operations securely across different hardware and software environments, ensuring integrity and confidentiality.
AndeSoft SW Stack encompasses a comprehensive set of software building blocks and middleware optimized for AndesCore processors. This rich collection includes operating systems, libraries, drivers, and middleware components, all meticulously designed to enhance software development speed and quality. By providing ready-to-use components, AndeSoft enables developers to focus on crafting their application-specific solutions, significantly reducing time-to-market. Its seamless integration with AndeSight IDE further enhances development efficiency, supporting diverse operating systems and being adaptable to various processor configurations for optimal performance.
The SiFive Intelligence X280 processor is crafted for the demands of AI and ML within edge computing environments. It integrates high-performance scalar and vector computing capabilities, making it ideal for data-heavy AI tasks like management, object detection, and speech processing. The X280 leverages the RISC-V architecture's open standards, bringing a high level of customizability and performance efficiency to AI applications. Equipped with SiFive's Matrix Engine, the X280 is capable of handling sophisticated AI workloads with its impressive maximum throughput of 16 TOPS for INT8 operations. This performance is achieved without compromising on power efficiency, maintaining a small footprint that makes it suitable for diverse deployment scenarios. The processor's scalability is a key feature, supporting vector lengths up to 512 bits to accommodate the demands of intensive machine learning operations. SiFive Intelligence X280 stands out for its role in reshaping the possibilities of AI at the edge, pushing forward the capabilities of machine learning with a comprehensive software and hardware integration. This approach ensures that the X280 can handle emerging AI challenges with ease, presenting a formidable solution for today's AI-driven applications.
Helion Technology's AES-XTS solution offers state-of-the-art encryption for data-at-rest in storage systems, adept at mitigating threats such as copy-paste and dictionary attacks. AES-XTS operates by encrypting disk sector data with blocks of 16-bytes under a secret AES key, incorporating a modifier value corresponding to each block's logical disk location. This method ensures that identical plaintext sectors stored at different positions yield different encrypted outputs. Designed to handle high performance requirements, Helion's AES-XTS cores enable custom levels of throughput scaling from 1Gbps up to over 64Gbps, suitable for diverse scenarios like servers and high-speed SSDs. The product range includes single, twin, quad, and giga variants, aligning closely with specific performance and logic resource parameters, optimizing both hardware usage and security efficacy. This flexibility and adherence to the IEEE 1619 standard make Helion's AES-XTS cores valuable for any application demanding secure disk-level encryption. Available for either ASIC or FPGA platforms, these cores are constructed to leverage the unique capabilities of each technology, achieving the best possible performance across different use cases.
Post-Quantum Cryptography Processing Engine Adds support for lattice-based cryptographic operations such as ML-KEM and ML-DSA. PQPlatform-Lattice provides post-quantum support for these NIST-standardized algorithms with minimal area, and leverages an existing SHA-3 accelerator, powered by PQShield-supplied firmware. It’s designed for minimal area, and maximum compatibility, and is deployed with optional firmware-backed side-channel resistance.
Post-quantum Software Development Kit Provides easy-to-use software implementations of both post-quantum and classical cryptographic primitives. It’s designed with prototyping and experimentation in mind, consisting of an integration of PQShield’s PQCryptoLib library with two popular high-level cryptography libraries: OpenSSL and mbedTLS. OpenSSL: a widely-adopted secure-communication library mbedTLS: primarily intended for use in embedded system and IoT deployments
Post-Quantum Security Subsystem A cryptographic subsystem, designed to provide cryptographic services. These services include post-quantum signature generation, verification, and secure key establishment. PQPlatform-SubSys uses its built-in CPU independently from the surrounding system, allowing cryptographic services to be offloaded efficiently from the system processor.
The DSHA2-256 co-processor is adept at boosting the SHA2-256 hash function's execution, following the FIPS PUB 180-4 compliance. Designed to handle rigorous data integrity and authentication tasks, it supports HMAC natively and accommodates SHA2 hashing in both 224 and 256-bit modes. This cryptographic part seamlessly interfaces with APB, AHB, and AXI buses, ensuring versatility across platforms. By enhancing data security protocols such as digital signatures, this co-processor plays a critical role in safeguarding modern digital communications.
The WiseEye2 AI solution by Himax represents a significant leap forward in AI-enhanced sensing for smart devices. Designed for low-power operation, this solution integrates a specialized CMOS image sensor with the HX6538 microcontroller to deliver high-performance AI capabilities with minimal energy consumption. This makes it ideal for battery-powered devices that require continual operation, facilitating a new generation of always-on AI solutions without the typical drain on battery life. Thanks to its ARM-based Cortex M55 CPU and Ethos U55 NPU, WiseEye2 offers robust processing while maintaining a compact profile. Its multi-layer power management architecture not only maximizes energy efficiency but also supports the latest advancements in AI processing, allowing for faster and more accurate inference. Additionally, its industrial-grade security features ensure that data remains protected, catering particularly well to applications in personal computing devices. By enhancing capabilities such as user presence detection and improving facial recognition functionalities, WiseEye2 helps devices intelligently interact with users over various scenarios, whether in smart home setups, security domains, or personal electronics. This blend of smart functionality with energy conscientiousness reflects Himax's commitment to innovating sustainable technology solutions.
The ONNC Calibrator is engineered to ensure high precision in AI System-on-Chips using post-training quantization (PTQ) techniques. This tool enables architecture-aware quantization, which helps maintain 99.99% precision even with fixed-point architecture, such as INT8. Designed for diverse heterogeneous multicore setups, it supports multiple engines within a single chip architecture and employs rich entropy calculation techniques. A major advantage of the ONNC Calibrator is its efficiency; it significantly reduces the time required for quantization, taking only seconds to process standard computer vision models. Unlike re-training methods, PTQ is non-intrusive, maintains network topology, and adapts based on input distribution to provide quick and precise quantization suitable for modern neural network frameworks such as ONNX and TensorFlow. Furthermore, the Calibrator's internal precision simulator uses hardware control registers to maintain precision, demonstrating less than 1% precision drop in most computer vision models. It adapts flexibly to various hardware through its architecture-aware algorithms, making it a powerful tool for maintaining the high performance of AI systems.
Helion Technology delivers efficient hashing solutions through their SHA family of products, including SHA-1 and the more secure SHA-2 family, as well as MD5 for legacy purposes. These hashing cores are implemented to transform arbitrary-length files or messages into unique, fixed-length digests, which act as veritable signatures of the original data. These secure hash algorithms (SHAs) are integral to digital signatures and message authentication applications, underpinning protocols like IPsec and TLS/SSL by ensuring integrity and authenticity. With configurations optimized for high-speed and low-area applications, Helion's hashing solutions prove effective in systems needing cryptographic checks. The cores are partitioned into the FAST and TINY controls, each catering to different throughput and resource trade-offs. FAST delivers performance up to 4Gbps, focusing on speed, while TINY configurations are geared towards minimal resource utilization, providing an ideal solution for energy-efficient, low-data rate needs in both FPGA and ASIC technologies.
The Securyzr Key Management System is designed to handle complex cryptographic key management centrally, ensuring secure generation, distribution, and storage of keys. This system is integral for maintaining the security of cryptographic protocols which form the backbone of secure communications and digital identity verifications. Featuring flexible and scalable key management strategies, this product is essential for industries with stringent data protection requirements such as banking, telecommunications, and cloud services. It is engineered to seamlessly integrate with a variety of IT infrastructures, offering powerful protective measures against unauthorized access and enhancing the overall security posture of an organization.
Featuring G15, this IP is optimized for 2KB correction blocks, suitable for NAND devices with larger page sizes, such as 8KB. The design is aligned with methods seen in the G14X, but it extends its reach with longer codewords for comprehensive coverage of high-density NAND. The design supports a wide array of block sizes and configurational setups, making it highly adaptable to varying design needs. Additional error correction capabilities can be integrated based on client requirements, reinforcing its bespoke delivery.
The G13/G13X series is tailored for 512B correction blocks, particularly used in NAND setups with 2KB to 4KB page sizes. While both variants are crafted to manage the demands of SLC NAND transitions to finer geometries, the G13X allows for correction of a higher number of errors. Designed to fit seamlessly into existing controller architectures, it enables extensions of current hardware and software capabilities without extensive new investments. It offers area optimization through parameter adjustments and supports a range of channel configurations for broad applicability.
The MACSEC Core provides an essential building block for implementing Ethernet data security, supporting protocols crucial for protecting data at the MAC layer in network infrastructure. It ensures confidentiality and integrity of the communications, making it invaluable for environments where data transmission security is paramount. A vital tool for network security, the MACSEC Core integrates seamlessly into various network processors, offering robust security for both small-scale and extensive network architectures. It stands out for its efficiency in encrypting and authenticating Ethernet packets, ensuring data remains protected from eavesdropping and unauthorized access. Designed for versatile network applications, the MACSEC Core can easily adapt to existing network configurations, enabling quick deployment and teeming with existing systems, thereby enhancing overall network security without extensive reconfigurations.
Post-Quantum Cryptography Processor PQPlatform-CoPro (PQP-HW-COP) adds PQShield’s state-of-the-art post-quantum cryptography (PQC) to your security sub-system, with optional side-channel countermeasures (SCA). PQPlatform-CoPro can be optimized for minimum area as part of an existing security sub-system. PQPlatform-CoPro is designed to be run by an existing CPU in your security system, using PQShield’s supplied firmware.
The FortiCrypt solution stands as a beacon in hardware security, offering unmatched protection against side-channel attacks and fault injection. Utilizing a multi-pipeline architecture, FortiCrypt is designed to deliver superior throughput without sacrificing performance or increasing latency, making it ideal for both authentication and storage encryption applications. This IP core's architecture includes unique features that protect not only the core encryption process but also the associated authentication mechanisms, setting it apart from standard solutions on the market. FortiCrypt's protection scheme is algorithm-driven and implementation-agnostic, meaning it fits seamlessly into any existing framework while maintaining its superior security measures. Its rigorous Test Vector Leakage Assessment certification underscores its resilience, having been validated both in analytical and real-world environments. The design is fully synthesizable, removing the need for custom cell designs, which saves time and resources in the development process. The FortiCrypt core offers multiple configurations, including ultra-low power and ultra-compact options, aligning with varying user-specific requirements. These configurations provide a balance between performance, energy efficiency, and gate count, making it a versatile choice for a wide range of applications from IoT devices to secure communication systems.
The PUFcc Crypto Coprocessor sets a new standard in embedded security solutions by integrating a robust Hardware Root of Trust with advanced cryptographic capabilities. Tailored for modern applications, PUFcc features a comprehensive set of NIST-certified cryptographic algorithms that enhances device security across all stages of its lifecycle. This coprocessor excels in managing key generation, storage, and execution of sophisticated cryptographic tasks, embedding security deeply within the hardware.<br><br>PUFcc distinguishes itself with its high-speed performance and adaptability to contemporary security standards. By including support for TLS 1.3, it meets emerging demands for secure communication protocols in IoT and AI applications. Its design is optimized for ease of integration, featuring standard interfaces that enhance the design process and reduce time to market for new semiconductor products.<br><br>Operability across different system architectures is enhanced through PUFcc's ability to interface with various external memory systems thus extending the security functions beyond conventional boundaries. It is particularly beneficial for sectors demanding high security and flexibility, offering a robust foundation for safe data transactions in critical infrastructures.
Helion Technology offers industry-standard AES solutions effective for high data security applications across various industries. Their AES cores, used globally in commercial developments, can perform encryption and decryption using 128-bit, 192-bit, or 256-bit keys, depending on the intended security level. These cores cater to needs ranging from ultra-low area usage and data rates to top-tier multi-gigabit applications. Helion’s AES cores are distinguished by their ability to deliver performance close to that of ASICs when programmed into FPGAs like those from Xilinx, Altera, Microsemi, and Lattice. Clients have access to a series of AES engine families that cover an array of requirements from ultra-low size to very high-speed executions. The cores are designed to seamlessly integrate into any design, emphasizing user-friendliness and flexibility. They cater to multiple modes, such as CBC, CFB, CTR, and others, with validated solutions for applications needing hardware acceleration of the basic AES algorithm. This portfolio further extends to specialized configurations for advanced applications like AES-CCM, AES-GCM, and those needing key wrapping or supporting communication protocols like IPsec and SSL.
The AES Core by Algotronix is a sophisticated solution tailored for securing data using advanced encryption methods. This core supports various encryption modes such as ECB, CBC, CTR, CFB, OFB, CCM, GCM, and XTS, which cater to a wide array of applications requiring different levels and methods of data protection. The flexibility in supported modes allows for tailored implementations in different security-critical environments. This encryption core is known for its deployment among prominent defense electronics organizations, and it has been operational within several NATO member states, testifying to its high-level security assurance and operational readiness in sensitive global contexts. Offered typically in source code form, the AES Core ensures that users can perform thorough security audits and tailor enhancements specific to their security policies and infrastructural needs. This capability positions Algotronix's offering as an optimal choice for organizations prioritizing stringent security postures.
ResQuant's Cyclone V FPGA solution is a powerful tool in achieving quantum-safe security, coming pre-integrated with a complete suite of NIST post-quantum cryptography standards. This FPGA solution ensures seamless integration and widespread applicability, facilitating practical proof-of-concept testing for quantum-safe applications. Its vendor-independent design ensures flexibility and adaptability across various setups and environments. The Cyclone V FPGA with PQC Processor is tailored to support sectors that demand rigorous security, such as automotive, ICT, and military applications. It is optimized for real-world scenarios where quantum-resistance is paramount, providing enhanced security for critical data and operations. With its robust performance metrics and adaptability, the Cyclone V FPGA stands out as a pivotal component for organizations preparing for a quantum-resilient future. In addition to its technical capabilities, ResQuant offers comprehensive workshops that guide organizations through the nuances of quantum computing threats. These workshops provide actionable insights and strategies, ensuring that ResQuant's clients can confidently navigate and implement advanced cryptographic solutions required for a secure future.
Specially designed for 1KB correction blocks, the G14/G14X series caters to NAND devices with 8KB page sizes. Its versatility allows support for both 512B and 1024B blocks, accommodating SLC and MLC flash requirements effectively. It enhances controller performance with provisions for extended wear leveling and robust error correction across various generations of flash technology. The series also offers customization possibilities to meet diverse latency, bandwidth, or spatial demands.
AES-GCM is an innovative authenticated encryption technique, employing universal hashing in a binary Galois field to secure data with concurrent privacy and authentication. Known for enabling very high data rates thanks to pipeline and parallel processing efficiencies, AES-GCM is used in a variety of networking and storage applications. This method is recognized by several standards, including MACsec and ANSI Fibre Channel protocols, offering unmatched data protection across high-speed environments. Helion's AES-GCM offerings span throughput requirements from modest 50Mbps to beyond 40Gbps, accommodating diverse performance and area constraints without sacrificing efficiency. These cores are meticulously optimized for major target technologies like Altera, Microsemi, and Xilinx FPGAs, as well as ASIC implementations, ensuring compatibility and high performance across platforms. Each AES-GCM version is tweaked for particular throughput needs while maintaining a compact logic footprint, reflecting Helion's engineering precision and quality. Whether for low or ultra-high bandwidth demands, Helion's solutions present robust encryption capabilities, underscored by ease of integration and operation benefits.
ResQuant's Individual IP Core Modules offer a plethora of options, each embedded with comprehensive NIST post-quantum cryptography standards. The selection includes powerful algorithms such as Dilithium, Kyber, XMSS, and SPHINCS+, alongside AES modes like ECB, CBC, and GCM, and secure hash functions like SHA2 and SHA3 families. These modules are crafted to fortify various systems with cutting-edge security mechanisms, ensuring data integrity and confidentiality. The flexibility of these IP Core Modules makes them incredibly beneficial for environments that require enhanced encryption and protection against quantum-level threats. Their design supports versatile applications, catering to tailored needs across different industry verticals, ensuring robust security solutions that align with future-proofing strategies. ResQuant's expertise shines through in these modules, highlighted by their inclusion of cryptographic protocols well-suited to counteract quantum computing challenges. Emphasizing scalability and adaptability, these IP Core Modules serve as key components for industries like IoT, automotive, military, and communications, which demand higher security affordances to safeguard critical operations and data from evolving threats.
Ocean Logic's AES Encryption Core represents a robust and reliable solution for securing data across numerous platforms. Renowned for its certification and extensive validation in silicon on both FPGA and ASIC, this IP core has established credibility and trust among a diversified customer base. The AES core has seen nearly 60 successful implementations, underlining its reliability in providing robust data security. This encryption core complies with stringent security standards, ensuring data integrity and confidentiality. It is subject to Australia's Export Control regulations, qualifying it for international deployment across numerous key markets worldwide. Such widespread recognition indicates its versatility and adaptability to meet various encryption needs. For businesses and organizations prioritizing data security, Ocean Logic's AES Encryption Core offers a proven, high-performance solution. Its design facilitates seamless integration into existing systems, providing a comprehensive encryption capability while maintaining operational efficiency. The IP core stands as an ideal choice for companies looking to fortify their security measures with a trusted, efficient, and scalable encryption architecture.
VeriSyno's Digital Systems and Security Solutions deliver high-performance digital IPs that are crucial in modern electronic design, catering specifically to the growing demand for secure and efficient systems. These solutions encapsulate years of expertise in digital design, offering vital IP cores necessary for building cutting-edge technology products. This suite aims at enhancing security protocols through its innovative designs, providing assurance in data protection and system integrity. Whether used for consumer electronics, industrial applications, or any sensitive data-driven operations, these solutions provide peace of mind and reliability. The company ensures these digital solutions remain adaptable to various architectures, highlighting their commitment to flexibility and client-focused innovation. With ongoing support and extensive customization options, the Digital Systems and Security Solutions offer a resilient foundation for any high-stakes technology ecosystems.
PhantomBlu, specifically engineered for military applications, offers sophisticated mmWave technology for secure, high-performance communications across various tactical environments. This product is designed for strategic defense communications, enabling connectivity between land, sea, and air vehicles. PhantomBlu excels in supporting IP networking on robust anti-jam resistant mesh networks, ensuring communication security and reliability. Its configurable and adaptable design makes PhantomBlu suitable for diverse military scenarios, from convoys on the road to high-altitude surveillance operations. The system is distinguished by its stealth capabilities like low probability of interception (LPI) and detection (LPD), as well as its highly efficient data transmission rate, which exceeds that of Wi-Fi and 5G technologies. PhantomBlu's deployment requires no dependency on fiber networks, featuring a quick setup process suited for mobile and tactical requirements. Its design supports long-range communications, effective up to 4 km and allows seamless integration with existing defense infrastructure, making it a future-proof solution for all modern military communications needs. The product is licensed for operations over 57-71 GHz, offering scalable and high-data rate networks essential for today's demanding defense operations.
VivEng's Thermal Noise-based Random Bit Generator unlocks a new dimension in cryptographic security and random number generation through the exploitation of thermal noise. Operating at frequencies between 0.2 to 2 MHz, this generator offers a typical quiescent current of 50 μA, perfect for low-power applications. By harnessing inherent thermal fluctuations, it generates random bits with high entropy, essential for secure communication and data encryption processes.
The Customizable Cryptography Accelerator from ResQuant is specifically designed to cater to unique client needs, with a variety of configurable options ensuring peak quantum-safe security. It is designed for seamless integration and supports all NIST PQC standards, including algorithms such as Dilithium, Kyber, XMSS, and Sphinx+. The accelerator is adaptable, allowing extensions by other algorithms and customer-specific requirements. This flexibility, combined with resilience against various side-channel attacks like Differential Power Analysis (DPA) and Timing, makes it a robust choice for secure implementations. The accelerator is further enhanced by its readiness for AXI 4 integration, positioning it well for incorporation into modern system designs. This makes it an efficient and future-proof solution for entities looking to adopt quantum-resistant security measures. Cost-effectiveness, coupled with superior security features, positions ResQuant's solution as a prime candidate for industries looking to shield their operations against future quantum threats. Their workshop offerings empower organizations, providing insights into quantum computing threats and strategies for transitioning to post-quantum cryptography. Participants gain an understanding of how to reinforce their infrastructure to withstand emerging quantum challenges, setting a foundation for proactive, quantum-safe security strategies moving forward.
Secure-IC's Post-Quantum Cryptography solutions are at the forefront of preparing for a future where quantum computing could challenge traditional cryptographic methods. These solutions ensure data and communications remain secure against the potential power of quantum decryption techniques. As this technology is expected to revolutionize cryptography, Secure-IC's post-quantum solutions involve new algorithms that are unlikely to be broken even by quantum computers. This proactive approach serves to safeguard data integrity in anticipation of technological shifts, providing long-term security solutions for industries like finance, healthcare, and defense, where data security is paramount. The post-quantum cryptography IPs are crafted to be highly integrative, compatible with existing systems while paving the way for new cryptographic standards in a quantum-ready future.
Post-Quantum Hardware Accelerator Power side-channel accelerator, supporting a wide range of Hash-Based Signature Schemes (HBSS). PQPlatform-Hash deploys tried-and-tested HBSS including quantum-safe LMS and XMSS (not hybrid). It provides acceleration of HBSS in embedded devices, especially where high throughput is required, or there’s a demand on signature verification. Hash-based signature schemes offer different trade-offs of memory/area to lattice-based, and as a result, PQPlatform-Hash is ideally suited for smaller key sizes, larger signature sizes, and processing times for key generation, signature generation and verification.
The RISC-V CPU IP NS Class, by Nuclei System Technology, is designed to focus on security-centric applications. It is ideal for fintech payments, IoT security, and other sectors where information security is of utmost importance. Built with a RISC-V foundation, this IP emphasizes modularity, allowing specialized configurations to meet specific security standards and requirements. With functionality geared towards comprehensive information security solutions, the NS Class provides support for Trusted Execution Environments (TEE) and additional physical security packages. It is tailored to satisfy stringent safety regulations, making it an apt choice for addressing vulnerabilities in high-stakes technological settings. This IP stands out due to its support for cutting-edge security protocols and adherence to top-tier safety standards such as ASIL-B and ASIL-D functional safety packages. Partners utilizing the NS Class can expect highly reliable, secure, and compliant solutions that maintain integrity and confidentiality across various application domains.
Designed for environments that demand high security and fault tolerance, this IP offers advanced features for encryption while maintaining operation stability during transient faults. With its fault-resistant architecture, the core ensures consistent performance and data security even in the presence of unexpected errors. Suitable for integration in critical industrial applications and secure communication systems, it enhances both security and reliability.
The IPSEC Core by Algotronix is designed to secure IP communications by providing robust encryption and authentication mechanisms. Essential for ensuring data confidentiality and integrity over IP networks, this core is suitable for embedding into network devices and systems aimed at safeguarding data against potential interception or tampering. Catering to a broad range of IP-based communication systems, the IPSEC Core offers flexibility and reliability, making it a preferred choice for developers focusing on secure data exchange methods. The ease of integration allows for its deployment in both new and existing network architectures, underpinning secure transmissions across increasingly complex digital environments. Its wide acceptance and deployment in secure communications underscore the IPSEC Core's effectiveness in delivering critical security features, thus supporting enterprises in protecting sensitive data across diverse network topologies.
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