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ADICSYS, a subsidiary of EASii IC, offers customizable Field Programmable Gate Array (FPGA) technology. This venture bridges the gap between ASIC design and FPGA solutions, boasting over a decade of experience in eFPGA projects and cutting-edge semiconductor products. The soft eFPGA IP is designed for ASICs and SOCs, independent of specific technology, and seamlessly integrates with standard RTL design processes. The main features of ADICSYS's offering include synthesizable IP that fits smoothly into standard design flows, allowing RTL to FPGA bitstream translation. These eFPGAs are known for their scalability and customizable nature, developed through a robust RTL to bitstream compilation flow. This design flexibility helps reduce the risk of errors, accelerates development, and enhances debugging capabilities in complex systems. The soft FPGA IP can be customized in terms of architecture parameters such as Look-Up Table (LUT) count and routing density, and it can be adapted for specific design constraints like power and area. By incorporating ADICSYS's solutions, users benefit from decreased time to market and increased reliability and adaptability in the field.
X-REL, a division of EASii IC, focuses on designing, manufacturing, and marketing high-reliability integrated circuits suitable for the most challenging environments. These chips are engineered to operate reliably at extreme temperatures ranging from -60°C to +230°C, catering to applications in oil and gas, aerospace, automotive, energy, and industrial sectors. The X-REL product line includes components like power management units, logic interfaces, transceivers, and more. Products in the XTR series are available in ceramic, metal, or die packaging for temperatures up to +230°C, whereas the XER series offers plastic packaging for environments up to +175°C. These components ensure long-term reliability over their operational life, reducing the overall system cost throughout the product lifecycle. X-REL's collaboration with globally recognized subcontractors guarantees unmatched quality and reliability, supported by ISO9001 and EN9100 certifications.
The EZiD211 is a highly advanced DVB-S2X demodulator/modulator, a product of EASii IC's SATCOM division designed for high performance in satellite communication systems. It caters to LEO, MEO, and GEO satellites, providing features such as Beam Hopping, VLSNR, and Super Frame to enhance data transmission capacities. Its architecture ensures compatibility with existing satellite infrastructure while pushing forward the new standards in DVB-S2X technologies. The EZiD211 integrates seamlessly within larger communication networks, furnishing robust modulation and demodulation capabilities that connect harmoniously with other components. EASii IC's EZiD211 enables efficient data handling and real-time signal processing essential for next-generation satellite terminal applications. It comes with an evaluation board to allow developers to explore its comprehensive capabilities, making integration into existing systems smoother and more efficient.
CoaXPress (CXP) is a prominent global standard for high-speed imaging in professional and industrial applications, including machine vision, medical imaging, life sciences, broadcasting, and defense. It combines the simplicity of coaxial cables with high-speed serial data transmission technology, offering a beneficial solution for imaging and data transmission requirements. EASii IC has developed CoaXPress IP for both Device and Host applications to meet internal camera and recorder design requirements. The IP is compliant with CoaXPress versions 1.1.1 and 2.0, enabling up to 256 video streams from multiple cameras through 1 to 8 coaxial cable connections. This setup allows a data rate ranging from 1.25 Gbps to 12.5 Gbps per cable, with total transfer rates reaching up to 100 Gbps. Dynamic link reconfiguration and hardware-based video-stream management are key features, supporting enhanced error detection and recovery. EASii IC offers a comprehensive CoaXPress design environment, including FPGA CoaXPress Device and Host IP cores, with associated hardware like FMC-CXP boards that stack to provide increased bandwidth capabilities.
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