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PermSRAM is an adaptable nonvolatile memory macro compatible with the standard CMOS platform, functioning across process nodes from 180nm to 22nm and potentially beyond. It offers diverse nonvolatile memory capabilities, including one-time programmable ROM and pseudo multi-time PROM, supported by a multi-page configuration. This memory series accommodates a wide range from 64 bits to 512K bits in size. PermSRAM is secured by a hardware safety lock, which ensures the non-rewriteability of sensitive security codes. The macro's design focuses on stability and offers high performance, making it an optimal choice for applications requiring secure code storage.
TwinBit Gen-2 advances the TwinBit series, supporting process nodes from 40nm to 22nm. It inherits the maskless integration features from Gen-1, facilitating cost-effective and low-power designs. This latest variant employs a novel 'Pch Schottky Non-Volatile Memory Cell' resulting in ultra-low-power operations. Its design is engineered for efficient hot-carrier injection, providing a robust solution for small-scale and energy-sensitive applications requiring non-volatile storage.
TwinBit Gen-1 is a versatile, embedded non-volatile memory solution that seamlessly integrates with CMOS logic processes from 180nm to 55nm nodes. With a focus on endurance, it offers over 10,000 write/erase cycles. Not requiring additional masks or process steps, TwinBit Gen-1 is ideal for sophisticated applications like analog trimming and secure key storage. It provides memory sizes from 64 bits to 512K bits, catering to a broad range of applications including those needing field-rewritable firmware or security codes.
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