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Tentiva Video FMC is a modular high-speed Video FPGA Mezzanine Card (FMC) designed specifically for advanced video processing needs. The board supports the attachment of multiple PHY card types, which equip the Tentiva with diverse connectivity options, enabling data transmission up to 20 Gbps. This modular approach allows developers to customize and expand their systems efficiently by adding or removing PHY cards as needed. Tentiva supports a range of video input/output configurations, making it highly adaptable for various projects, including those requiring both DisplayPort and embedded DisplayPort applications. Designed for seamless integration with FPGA development boards featuring FMC headers, Tentiva facilitates connections to multiple transceiver inputs and outputs, broadening its application potential across different multimedia projects. The availability of compatible PHY cards such as DPTX and DPRX further extends its functionalities, accommodating complex video processing requirements.
The Alcora V-by-One HS FMC daughter card is expertly crafted to bring the high-speed V-by-One HS interface technology to FPGA platforms. This card connects seamlessly to FPGA boards using high-speed transceiver lanes, facilitating video resolutions that reach up to 4K at 120Hz or 8K at 30Hz. Featuring both 51-pin and 41-pin header options, Alcora provides developers with versatile integration capabilities. Its dual clock generators play a crucial role in synthesizing precise transceiver reference clocks while minimizing RX clock jitter, which is pivotal for maintaining video quality and signal integrity. Developed by THine Electronics, V-by-One HS is renowned for its ability to support high-resolution, high-frame-rate video transmission in flat panel displays. This technology's inclusion in Alcora ensures that it meets the rigorous demands of modern video applications, making it a perfect addition for those developing next-generation display solutions.
The Lancero JPEG-LS Encoder IP is a highly efficient FPGA-based implementation of the JPEG-LS standard, designed for superior lossless image compression. This IP core sets a high benchmark for image compression with minimal resource usage and eliminates the need for external memory. JPEG-LS excels in lower complexity and resource demand compared to JPEG-2000, delivering better compression for numerous lossless scenarios. The core is capable of handling image samples ranging from 8 to 16 bits, providing flexibility across various image-processing tasks. Its architecture supports pixel and data FIFO interfaces in addition to the Avalon Streaming interface with back-pressure control, ensuring robust data management and throughput. The IP's design allows one pixel to be encoded per clock cycle, optimizing performance for high-speed image processing applications. Developers can configure output data word widths and adapt image sizes up to ultra-high-definition, accommodating diverse applications from medical imaging to high-end photography.
The DisplayPort 1.4 core offers a comprehensive solution for DisplayPort-based designs, supporting both source (DPTX) and sink (DPRX) functionalities. It accommodates various link rates including 1.62, 2.7, 5.4, and 8.1 Gbps, as well as eDP rates, providing flexibility for different applications. The IP infrastructure supports 1, 2, and 4 DP lanes, making it suitable for various display configurations. Featuring native video and AXI stream interfaces, the core efficiently manages video streams with single and multi-stream transport modes. It handles dual and quad pixels per clock alongside support for 8 & 10-bit video in both RGB and YUV color spaces. This versatility ensures that designers can integrate the IP into a multitude of systems, ensuring high compatibility and performance. Additionally, the core is bundled with a Video Toolbox for specific video processing tasks, which include timing and test pattern generation as well as video clock recovery. A sleek host driver and API facilitate its integration and control, while support for a wide array of FPGA devices, including AMD and Intel's leading technologies, ensures flexibility in its deployment.
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